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I have been using the following buffer(inside the dashed rectangle) as a driver where the 3.3V uC pulse is converted to 12V pulse which is then coupled to a MOSFET gate in this case. I have seen this transistor circuit somewhere I don't remember but it was for 5V uC input.

enter image description here

Now I'm wondering especially "what could be the reason for the D1 at the emitter of Q2" there? And if not much I also would like to get some insight on what makes the given values for R11, R12, R13 and R14 in that design?

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  • \$\begingroup\$ D1 is at the emitter of Q2, not Q1! Think about when does Q2 switch on/off depending on the input voltage (from uC) when a) D1 is not present (emitter of Q2 = GND) and b) when D1 is present. For simplicity you could assume that Q2 is off when \$V_{BE}\$ < 0.7 V and on when \$V_{BE}\$ > 0.7 V. \$\endgroup\$ – Bimpelrekkie Mar 9 at 14:15
  • \$\begingroup\$ Sorry I will update that Q2 yes \$\endgroup\$ – ty_1917 Mar 9 at 14:18
  • \$\begingroup\$ The common-emitter stage has an input voltage threshold of VBE = 0.7 V (one Si diode drop). In such switch applications, it is preferable to increase the threshold. You can do it by adding an additional diode in series to the base-emitter junction. For this purpose, you can insert the diode before the base or after the emitter (as in your circuit). How do you think it's better? Why have they inserted the diode in the emitter? \$\endgroup\$ – Circuit fantasist Mar 9 at 15:24
  • \$\begingroup\$ @Circuitfantasist I think as in the other answer D1 increases the noise margin. If D1 were at the base, the noise margin would not improve. Correct? \$\endgroup\$ – ty_1917 Mar 9 at 15:26
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    \$\begingroup\$ @Circuitfantasist Thanks and please also add why adding to emitter makes it better than adding to the base. I wrote down formulas from the large signal model to verify it but couldn't succeed. A mathematical or step by step proof would be great. \$\endgroup\$ – ty_1917 Mar 10 at 10:57
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To understand a new circuit means to see well-known circuit concepts and building blocks in the new circuit solution. Let's apply this technique to the present circuit.

Structure. This is a digital circuit - a voltage level converter, operating as a switch with two states. The input voltage of 0...3.3 V is converted to output voltage of 0...12 V by two cascaded (connected one after another) common-emitter stages. They are implemented by complementary bipolar transistors (n-p-n Q2 and p-n-p Q1).

Emitter diode

Concept 1. The first concept that we see here is: To drive bipolar transistors by voltage sources with V > 0.7 V, we have to insert base resistors. There are a few explanations of this need: The base resistor absorbs the voltage difference VIN - 0.7 V, limits the base current, converts the input voltage to current, enlarges the input voltage range up to extremely high values, etc. So R13 enlarges Q2 maximum base voltage to 3.3 V… and R12 enlarges the Q1 base voltage to 12 V. The first voltage is obvious - this is the output voltage of the microcontroller port. The second is the 12 V supply voltage. It is applied to Q1 base through R12 when Q2 is on.

Concept 2. The next concept is to introduce threshold in the input of switching circuits. Q2 has the inherent Si base-emitter voltage threshold of 0.7 V but they decided to increase it. The simple solution is to add another voltage drop of 0.7 V by inserting another (forward biased) diode in series to Q2 base-emitter junction. We can do it in two ways - before the base and after the emitter. The difference is in the current flowing through the diode. In this case it would be beta times smaller than in the picture… and the voltage drop across the diode would be smaller than 0.7 V (look at the diode IV curve). That is why they inserted the diode in the emitter where the big emitter current flows. Indeed, this "lifts" also Q2 collector voltage when saturated but this is not important in this configuration.

Concept 3. Another very important concept that we can see, is: Never leave the transistor base “floating” (unconnected to ground). The reason is that, in this case, it is vulnerable to noises, leakages and static electricity. Hence the role of R11 and R14.

In particular, the role of R11 is to shunt Q1 base-emitter junction when Q2 is off while the role of R14 is to protect Q2 base when the circuit input is left floating (the microcontroller is not connected to it).

R11-R12. Only, R11 and R12 constitute the basic circuit building block voltage divider. It has to be calculated so that when Q2 is on, the voltage drop across R11 to be more than 0.7 V - VR11 = 12.R11/(R11 + R12) > 0.7 V. With some reserve, this means R11 > 1 k. When Q2 is off, the junction is high resistive and R11 can be high (hundreds of koms, typically 100 k).

So the value of R11 is not so important; it can vary widely since it is connected in parallel to Q1 base-emitter junction... and we can assume the range of R11 is 1 ÷ 100 k. The role of R11 as a "pull-up" resistor is minor when Q2 is on; then Q1 base-emitter junction "pulls up" R11-R12 midpoint. R11 really "pulls up" it when Q2 is off.

R13-R14. Similarly, R13 and R14 constitute another voltage divider. It can be calculated in a similar way so that when VIN = 3.3 V, its output voltage (across R14) to be more than 1.4 V...

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  • \$\begingroup\$ This was an amazing way of explanation! Thanks a lot! Just I have difficulty why R11 is 100k. When I set it to even 1k the transistors still saturates and the circuit works.Could you give some more hint what determines the value of R11? Is this just a pull up resistor and its value doesn't matter as long as it can pass current for 0.7V? \$\endgroup\$ – ty_1917 Mar 11 at 5:22
  • \$\begingroup\$ You are right... R11 value is not so important; it can vary widely since it is connected in parallel to Q1 base-emitter junction. When Q2 is off, the junction is high resistive and R11 can be high (hundreds of koms, typically 100 k). When Q2 is on, the junction is low resistive and shunts R11. The voltage divider R11-R12 should "produce" voltage VR11 = 12.R11/(R11 + R12) > 0.7 V. With some reserve, this means R11 > 1 k as you have found. So the range of R11 is 1 ÷ 100 k. The role of R11 as a "pull-up" resistor is minor when Q2 is on; then Q1 base-emitter junction "pulls up" R11-R12 midpoint. \$\endgroup\$ – Circuit fantasist Mar 11 at 6:27
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Noise margin is the reason.

Tho the high value of R11 reduces the noise margin.

However the R11 responds well to FET gate charges splitting into gate R , and also coming thru the bipolar Cob (base-collector).

this will appear as "snappy" switching, or as outright oscillation.

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  • \$\begingroup\$ oscillation? why? \$\endgroup\$ – ty_1917 Mar 9 at 14:44

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