I have my CAN configuration as shown in the below drawing(automotive application), the uC that I’m using has both the CAN controller and the physical layer transceiver built-in so I don’t need a transceiver outside the uC. I have a doubt regarding the common mode choke, I have read that the common mode choke will degrade the signal, below is the link to the question where this is stated Are Common Mode Choke Coils needed on USB? 1) I would like to understand how the signal degradation can be evaluated, I'm trying to select a common mode choke for CAN network with 500kbps baud rate and want to know things I have to consider while choosing a common mode choke. I understand that there will be some delay in the signal, but is there any way to theoretically calculate this time by simulation ? Or is testing required ?
2) Below is the link to an application note by TI, titled “Common Mode Chokes in CAN Networks: Source of Unexpected Transients”, which states that “extremely high transient voltages that maybe generated by the inductive flyback during a short circuit of a CAN bus line to a dc voltage.” Should I test my circuit during short circuit conditions to see the voltage that the uC pins will see. http://www.ti.com/lit/an/slla271/slla271.pdf
3) Apart from EMC tests, is there any other electrical test that I can conduct to look at the effects that the common mode choke has on my circuitry.
4) I also want to see the effect the capacitors C2, C3 and diode D1 has on the circuitry during ESD pulses. Is there a ESD pulse model available in LTspice and is it possible to simulate and see the results in Ltspice ? Is it feasible to do this ?