ARM Cortex M3 Systick Question

Question

I ran across some code that is being used to create a 1ms timer in polling mode, not interrupt mode. However, I'm having a hard time wrapping my head around the function.

So the Systick is configured like this:

Systick->LOAD = 19999UL;
Systick->VAL = 0UL;
Systick->CTRL = Systick_CTRL_CLKSOURCE_Msk | Systick_CTRL_ENABLE_Msk;

So this makes sense. The systick is configured for a 1ms reload value (processor system clock is 20MHz). The systick is enabled but not setup for interrupts, but rather polling.

Now is where I get confused. The following code handles the polling of the systick register:

if(SysTick_CTRL_COUNTFLAG_Msk == ((Systick->CTRL) & Systick_CTRL_COUNT_FLAG_Msk))
{
    Systick->CTRL |= Systick_CTRL_COUNTFLAG_Msk;
    Timer_ms++; 
}

So I'm confused about the line

Systick->CTRL |= Systick_CTRL_COUNTFLAG_Msk;

I don't understand why this line is there. When you read the control and status register, the countflag bit resets according to the spec. So why is the code setting the bit to 1 after it was already 1 and reset via the read?

Thanks.

Answer 1

Not all code you happen to run across is correct and perfect. Indeed the bit should reset itself when it is read. It may not be even get set when trying to set it, so it may be useless to try to set it. Perhaps the programmer who wrote that code did not know the bit resets itself, and incorrectly tries to reset the bit by writing 1 to it, which is the correct way to reset many other flags.