Design of bypass capacitors in circuits

Question

I have a question when designing a circuit.

I want to power two sensors with a 3.3V LDO. My question is the following, in the LDO datasheet they recommend me to place a 10uF capacitor at the output of this one, but in the datasheet of each sensor, they recommend me to use 10uF and 0.1uF capacitors.

My question is, do I have to use as many capacitors as each datasheet asks me, or can it be solved in another way?

The same happens with the LDO input, it is recommended to use a 10uF bypass capacitor, but that same input that goes to the LDO, goes to another IC that advises to place a new capacitor.

Do you know which would be the best solution to these cases?

Answer 1

The datasheets tend to play safe and show a typical circuit that should work in most cases. The datasheets can't know what other components there are, what their requirements are and what is the distance between components.

As you don't mention either what components you have and what is the distance between them, there is no way to say what is the best solution. It may be hard even if it was known.

So design with all the capacitors, and you can then try it two ways: either mount all capacitors and start removing them if issues happen, or mount only minimal amount of capacitors and start adding them until issues go away. If the chips are really close, perhaps one set of 10uF and 0.1uF will do.

But there may be other requirements, such as what type of capacitors the datasheets suggest for each chip. LDOs may not like ceramic caps as they can have too low ESR, while the other two chips might benefit from ceramic caps.

Answer 2

Put a 100nF as close as possible to each pin that requires one, if that means multiple parallel capacitors then so be it. For larger capacitors like 10uF where high frequencies are less important, you can usually use a single capacitor for multiple devices and then put them a little further out of the way.

Answer 3

The general idea of bypassing is to minimize the loop area of noise, that is, to suppress it as close to the source as possible so as to prevent the noise from affecting other parts of the system.

The time-honored rule of thumb is to bypass load ICs using 0.1uF at the device pin, and use a bulk bypass at the regulator. This works fine for most systems.

More demanding applications, like fast memories or big SoCs, mix bypass values to obtain broader frequency coverage. This must be done with care, as caps of different values can interact in a way called anti-resonance that will actually make things worse.

For an LDO, it is usually not necessary to use a 0.1uF at the output, just bulk to improve transient response (check the LDO datasheet.) There are even LDO regulators that don’t need output bypass at all, bulk or otherwise (TI ‘Capfree’ LDOs for example).

Murata has a good app note on bypass design which covers not only the use of capacitors but other kinds of filtering like ferrites and feed-though caps. See here (pdf): https://www.murata.com/~/media/webrenewal/support/library/catalog/products/emc/emifil/c39e.ashx