We are working on an ADC that has maximum sampling rate of 2.5MSps at clock frequency of 40MHz and Vref of 2.5V. The architecture is SAR and it carries out the calibration internally. Currently we are running at clock frequency of 32MHz and sampling rate of 1.25MSps. We are reconstructing the analog waveform using MATLAB from the raw data collected and are observing a periodic noise. We are unable to comprehend the cause of this noise. enter image description here The noise is approximately equal in amplitude ~80mV. We have also observed noise on power supply of the FPGA that is collecting the raw data but the frequency of the noise was very low. We need your help in troubleshooting this noise. Even if you could give us any pointers to look at, that would be greatly appreciated. Please let us know if you need further information regarding the setup of the system. EDIT: Schematic is attached below. Analog input is given to the "Input circuit". C42 is shown DNP but we have connected a capacitor of 1uF 16V. We are using Analog Discovery 2 as our signal source. Regards. enter image description here

enter image description here

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    \$\begingroup\$ It's correlated noise, if you have to use "noise" as part of the description. You should study the details you see to help track it down. I already see: (1) on the rising slope you see an up followed quickly by a down but on the falling slope you see the opposite; (2) at the trough and peak the spacing is wider, but on the rising and falling slopes where the derivative magnitude is larger the spacing is narrower. So this correlated noise isn't just an isolated clock source, but it is also tied into the signal you show. I do think the ADC is implicated here. \$\endgroup\$
    – jonk
    Commented Mar 12, 2020 at 6:11
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    \$\begingroup\$ What's the actual ADC type? This looks a lot like you've got problems with the SAR algorithm it runs. (I really think @jonk is on point with his ADC concerns here) \$\endgroup\$ Commented Mar 12, 2020 at 8:15
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    \$\begingroup\$ I am open to being wrong. HOWEVER, determining whether the spikes are on the input seems like a good first step. \$\endgroup\$
    – user57037
    Commented Mar 12, 2020 at 8:34
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    \$\begingroup\$ @mkeith near our input circuit we only have LDOs ADP1720 placed and no other digital circuit. We can't check input signal at exact pin of the chip but we checked at the "input circuit" but couldn't find these edges on it. \$\endgroup\$ Commented Mar 12, 2020 at 12:23
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    \$\begingroup\$ @jonk We had used the same ADC in chip on board package and these edges did not appear on the raw data. \$\endgroup\$ Commented Mar 12, 2020 at 12:25

1 Answer 1


Do you need to read more than 1 byte in more than 1 read operation to read an ADC value?

If so, you need to synchronise reading correctly to ADC conversions.

If the ADC periodically samples between reading the MSB and the LSB, you will get periodic error that looks exactly like this.

For ADC samples 1.01 and 0.99, you can read 1, then .99, Put them together, guess what? 1.99.

I can't say this is exactly your problem because you don't tell us what the ADC is - resolution, interface typ, or link to the datasheet, and I can't enlarge those schematics in the middle of editing an answer. But it's one possible (likely) problem that has bitten someone here before.

  • \$\begingroup\$ Yes! The glitches are all the same size and they occur at regular voltage intervals. \$\endgroup\$
    – Mattman944
    Commented Mar 12, 2020 at 15:16

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