Bear with me, the schematic editor wasn't really made for this...
simulate this circuit – Schematic created using CircuitLab
In the circuit on the left, we can see 10pF feedback capacitance, carrying a fraction of the anode voltage back to (and in antiphase with) the input voltage on the grid. This capacitance arises naturally from two conductors in close proximity. As the anode voltage is many times the input voltage, this practically destroys the gain at high frequencies.
The circuit on the right depicts a tetrode valve, a natural progression towards the pentode. (I can't find a good way to depict a suppressor grid, and FETs don't generally have secondary emission problems so there's no need for one).
In this, GRID 2 is biased to a DC voltage, therefore the Miller charge is conducted harmlessly to ground (in an AC analysis we ignore the DC bias voltages), and GRID 1 sees only 10pF to GRID 2 = ground.
As the second grid is an open structure (a spiral of very thin wire) there IS still some remaining Miller capacitance from anode to grid 1 - the value here ( 7 Femtofarads) is taken from a 1940s EF50 pentode.
This has much less effect on the bandwidth than the triode's 10 pF.
Now this is very much a 21st century problem, since we have progressed from 10pF or so Miller capacitance in a typical vacuum tube triode, to 2000pF or so, in a power MOSFET. When you turn a MOSFET switch on, as the anode(cough)drain voltage starts to fall, the grid(cough)gate voltage flattens for many nanoseconds, as you pump in current to counter the miller capacitance. This is a well known issue in SMPS, motor drivers, inverters etc, requiring amps of gate drive current to switch fast and reduce switching losses.
If somebody reading this could see a practical way of tetroding a MOSFET switch without wasting power in the cathode to Grid2 voltage, that would make for a pretty valuable patent!