I'm making a circuit board with Ethernet (PoE if that makes a difference) coming in through an M12 connector, passing through magnetics and a PHY and going to a micro. I've always heard that there are two things to be avoided when routing high-speed signals: vias because they mess with impedance (which I've matched pretty closely to 100 Ohms) and routing on the top/bottom layers because EMI/EMC.
I've already had to use some vias when routing from the M12 connector to the magnetics due to pin layout, but the stretch from the magnetics to the PHY is currently on the top layer only. I'll only be using 10/100 speeds, the routed length is about 20mm, there can/will be a ground plane underneath the signal, everything is length-matched.
Which is the greater evil? Having vias or routing on the top/bottom layers? Does it matter at all at that speed/trace length?
Here is the original layout:
Here is the layout after rerouting the input to eliminate vias. Since only 2 pairs are used in 10/100, I didn't bother with length matching/single-layer routing for the other two: