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From Wikipedia, "a multiplexer, also known as data selector, is a device that selects between several analog or digital inputs and forwards it to a single output line."

https://en.wikipedia.org/wiki/Multiplexer

Each input take turns in connecting to the output line. There is only one input channel transmitting at a time. When an input is selected, it is as if there is a continuous path from that input to the output line.

enter image description here

So therefore, the line rate of the output channel must be the rate of which input it is connected to. For example, consider the figure above. If input B is selected, and its rate is 64 kbps, the output rate should also be 64 kbps.

But we know that in T-carrier system this is not the case. The rate of T1 is 1.544 Mbps because it is 24 channels of 64 kbps each plus 1 framing bit of 8000 samples per second.

Now that's the mathematics. But in terms of electronics, how could the multiplexer transmit at a rate higher than the input rate?

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  • \$\begingroup\$ Drive the switch selectors fast enough and you can sample all 5 channels within one 64kb/s bit time. If the line can handle 320kb/s, that is. \$\endgroup\$ – Brian Drummond Mar 23 at 15:07
  • \$\begingroup\$ That was my first intuition. But that would only work with bit-interleaving. T-carrier is byte-interleaving. \$\endgroup\$ – Noob_Guy Mar 24 at 5:08
  • \$\begingroup\$ Then it has to assemble entire bytes, select one in an 8-way version of your switch, feed that to a seriallzer, and reverse the process at the other end. More complex logic, longer latency, that's all.About one card of TTL for each end, in the days I met it (E1, 2048 kbits but same basic idea) \$\endgroup\$ – Brian Drummond Mar 24 at 11:24
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Nothing magical about it. Perhaps you are getting confused because your diagram is just of the "selector" type multiplexer which is just a bunch of switches that connects the output to ONE of many inputs. With nothing but switches, what comes out is literally what comes in so of course the output must match an input somewhere.

But that's not the kind of multiplexer you are actually asking about. The kind of multiplexer you are asking about combines multiple data streams together so they can be transitted on the same medium and consists of processors and circuitry that can sample, encode, and re-transmit the signal. This is, perhaps more accurately, called an encoder. But there are encoders that do not multiplex multiple signals together.

If you have n-input channels each with a data rate of x, then you just have your multiplexing encoder simultaneously sample all channels at a rate of x, and for each round of samples it just encodes and blasts off the data down the line at a rate of n*x plus overhead.

The demultiplexing decoder does the opposite. It is receiving an encoded stream at a rate of n*x, and every time a full set of channel data is received it updates the outputs of the demux.

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  • \$\begingroup\$ Follow up question. Why should a synchronous multiplexer transmit at a rate of n*x? That's not necessary in asynchronous multiplexing. For example, imagine we have two local area networks. Each network is connected to an Ethernet switch. Then we connect the two Ethernet switches. It is possible that the access ports are 1 Gbps but the trunk port is only 100 Mbps. Couldn't we do the same with synchronous multiplexing? What would be the consequence if T1 was not 1.544 Mbps? \$\endgroup\$ – Noob_Guy Mar 23 at 7:57
  • \$\begingroup\$ @Noob_Guy a network switch is not a synchronous multiplexer; it's different type of multiplexer, again. \$\endgroup\$ – Marcus Müller Mar 23 at 10:31
  • \$\begingroup\$ @Noob_Guy It is possible that the access ports are 1 Gbps but the trunk port is only 100 Mbps The access port hardware might have the capability to operate at 1Gbps, but that doesn't mean it will actually do so. Bottlenecks are a thing. \$\endgroup\$ – DKNguyen Mar 23 at 12:54
  • \$\begingroup\$ Even in the plain switch diagram the OP posted the line bandwidth could be anything, depending on how fast the switch switches. \$\endgroup\$ – RJR Mar 23 at 13:23

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