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I commonly see voltage references implemented with op-amp buffers as shown below. That's the simplest way.
However, see below another way of doing it which I found in a meter:
The second one seems it has more robust filtering. Is it really needed? Of course, I don't know why the designer did that. There may be a reason. I'd like to understand under what criteria the designer would choose this topology.
I don't know why the designer did that. There may be a reason. I'd like to understand under what criteria the designer would choose this topology.
Op-amps generally can't handle excessive capacitance on their outputs such as C2 and C3 in your 2nd circuit and so, if the designer feels he or she needs to add them for extra noise immunity on the Vcc/2 line then, precautions need to be made to ensure that the op-amp does not turn into an oscillator. Those precautions are C1, R3 and R4.
we can predict the TOTAL INTEGRATED RANDOM NOISE of that circuit, simply by using the value of C3.
Using Vnoise = sqrt(K * T /C) and this produces 20.00 microVolts RMS at 10 picoFarads, assuming some resistor feeds into the capacitor, and there are no other noise sources.
In the above circuit, the OpAmp and R1 and R2 produce random electron noise, but we'll ignore those 3 sources (+ power supply noise) for a moment.
Given
10pF 20uVrms
1,000pF 2uVrms
100,000pF 0.2uVrms
10,000,000pF 0.02uVrms
then your 1uF produces sqrt(10) * 0.02uV or 0.0628 uVrms. Or 63 nanoVolts RMS.
Now about those other sources? I'll let you run a SPICE sim to garner some insights.
