# MLC NAND Flash page interleaving

I'm trying to understand the pattern used for page interleaving on word lines in MLC flash. I've come across a number of resources that show how even-odd paging works in detail, but the few examples I've found of interleaving or "All bit line" (ABL) in the MSB or LSB of a wordline are less clear.

For example, in this textbook on page 267, we have the following diagram:

I don't understand how you decide which pages to place together in either organization, in terms of mapping a page number to a wordline number and its upper/lower bit.

From cross referencing other materials, I've gathered that the first and last wordline map together the page numbers (0,4) and (122,126) respectively. It appears that all other wordlines map together pages as (N, N+6). I'm having trouble finding any other pattern with the limited example numbers here. For example, this journal article shows a flash memory with 128 pages, with what appear to be special cases in the first and last word lines:

Could anyone explain a closed-form expression for what wordline and bit each page will map to? I can treat the first and final page as special cases, but I have no idea if that represents what is actually done.

Confirmed with another publication, it appears that the first and final wordlines are indeed special cases. The second image has a typo, the final two wordlines should be WL30 and WL31.

With this in hand, the page layout under "all bit line" (ABL) page programming is defined:

// Given wordline n on [0, MAXN], page on [0, MAXPAGE]

LSB_Page(n) := 0 when n == 0
else 2 * n - 1
MSB_Page(n) := 2 * n + 1 when n == MAXN - 1
else 2 * n + 2


For ABL with even-odd interleaving as well:

// Given wordline n on [0, MAXN], page on [0, MAXPAGE]

Odd_LSB_Page(n)  := 1 when n == 0
else 3 + 4 * (n-1)
Odd_MSB_Page(n)  := MAXPAGE when n == MAXN
else 5 + 4 * n
Even_LSB_Page(n) := 0 when n == 0
else 2 + 4 * (n-1)
Even_MSB_Page(n) := MAXPAGE - 1 when n == MAXN
else 4 * (n+1)