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It's my first time working with an active low Enable IC and I'm not intuitively understanding the connection. EN_N pin of the IC has an internal pullup resistance of 1.1Mohm and I'm planning to use STM MCU GPIO to control the EN_N pin. Since this IC needs to be active most of the time, I want to pull it down normally, and only pull it up when not in use. So like the attached picture, GPIO1111, which is the GPIO of the MCU, is connected directly to the EN_N pin with a matching resistor of 1.1Mohm. Is this a correct way of connecting?

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  • \$\begingroup\$ What the chip is and what does it do in the system? Do you still want the chip to be enabled, even if the MCU is only booting up after powerup, getting firmware update, or kept in reset? Sometimes you might want it enabled when the MCU is not controlling the board, but sometimes you might not. \$\endgroup\$ – Justme Mar 24 '20 at 8:01
  • \$\begingroup\$ @Justme The IC is TUSB320LAI USBC Controller by TI. There is a different SKU with EN pin active high, but since this controller will be on the most of the time, I decided to go with the active low EN pin part. I wanted to connect the GPIO just in case when a reset is needed. \$\endgroup\$ – BrianH Mar 25 '20 at 11:24
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1.1 MΩ is a high resistance, making the internal pull-up resistor very weak. By connecting an external pull-down resistor of the same value, you have effectively created a voltage divider such that the pin will, absent noise or unwanted signals, be indeterminate.

Your schematic is correct, but the value of pull-down resistor should be re-evaluated. In order to assert a definitely low condition on the EN_N pin, consider a stronger 10 KΩ value.

(If battery life is a concern, higher resistance values may be warranted, but must be low enough compared to the internal pull-up to produce a sufficiently "low" voltage.)

Consider:

$$V_{out} = \frac{V_{source} \times R_2}{(R_1 + R_2)}$$

Simple voltage divider

Simple voltage divider (CircuitLab is not cooperating today)

If R1 is the internal pull-up and R2 is the external pull-down, then with both values equal you have 50% of V_source. For example if V_source is 3.3V, your EN_N pin would "see" 1.65V, which would not be considered "low."

If R2 is 500KΩ, V_out becomes approximately 1V, which might be considered low depending on the IC.

10K to 100K would be my recommended range but depends on the IC, noise immunity, tolerance for constant current consumption, etc.

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Case #1) The device must remain disabled until signal GPIO1111 actively drives a control signal onto input EN_N to enable (LOW) or disable (HIGH) the device.

Remove resistor R28; that's all you need to do.

The EN_N input is connected to VCC (+power) through the internal 1.1 megohm pull-up resistor, which ensures EN_N's default logic state is HIGH (device is disabled) when the EN_N pin is "floating"—i.e., when no external signal source is connected to EN_N, or when an external device is connected but it is not actively driving a logic LOW voltage nor a logic HIGH voltage onto EN_N.

If signal GPIO1111 is a digital logic output signal, and if GPIO1111 is never disabled (placed into a high impedance state), then GPIO1111 continuously drives either a logic LOW voltage (enabled) or a logic HIGH voltage (disabled) onto the EN_N pin. Your software simply needs to configure GPIO1111 for logic LOW or HIGH as needed.


Case #2) The device must be enabled (EN_N = logic LOW) when signal GPIO1111 is not present—i.e., when GPIO1111 is not actively driving a logic LOW or a logic HIGH signal onto the EN_N pin.

In this case resistor R28's value must be chosen to ensure the voltage at EN_N (\$V_{EN\_N}\$) is within the range

$$ 0 \le V_{EN\_N} \le V_{IL} $$

where \$V_{IL}\$ is the maximum voltage for a logic LOW input signal at the EN_N input. \$V_{IL}\$'s value for the EN_N input should be specified in the device's datasheet. (NB: Datasheets often specify \$V_{IL}\$'s value for all input pins, rather than specifying \$V_{IL}\$'s value repeatedly for each individual input pin. Sometimes, however, a datasheet will specify \$V_{IL}\$'s value for specific input pin if that pin requires different voltage levels for the applied logic signals compared to the other input pins; so be sure to look for that case also.)

To ensure some noise immunity I suggest that EN_N's default voltage be no greater than 70 % of \$V_{IL}\$.

For example: Assume \$V_{CC}=5\,\mathrm{VDC}\$, and assume the device's data sheet states \$V_{IL}=0.5\,\mathrm{V}\$. (NB: I'm randomly choosing \$V_{IL}\$'s value, so don't assume this is the correct/required value.) Your job is to design a resistive voltage divider whose output voltage is no greater than \$V_{IL}=0.5\,\mathrm{V}\$. As a best practice I suggest the divider's output voltage be no greater than 70 % of \$V_{IL}\$, or \$V_{EN\_N(LOW)}=0.35\,\mathrm{V}\$. Using the resistive voltage divider equation, where the top of the divider is connected to VCC and the bottom is connected to ground, solve for resistor R28's value:

$$ V_{OUT} = \frac{R28 \cdot V_{CC}}{R_{PULLUP}+R28} = V_{EN\_N(LOW)} = 0.35\,\mathrm{V} = \frac{R28 \cdot (5\,\mathrm{VDC})}{(1.1\,\mathrm{M\Omega})+R28} $$

Next, use a table of standard resistor values and choose a standard value for resistor R28.


:: CHECK :: Plug your chosen resistance value for resistor R28 into the resistor voltage divider equation above and solve for \$V_{OUT}\$. Ensure \$V_{OUT} \le V_{EN\_N(LOW)}\$.


:: CHECK :: When GPIO1111 outputs logic HIGH, ensure resistor R28 does not draw too much current from the logic output pin that supplies signal GPIO1111. For example, if \$V_{CC}=5\,\mathrm{VDC}\$ and your chosen value for resistor R28 is \$R28 = 1\,\mathrm{k\Omega}\$, the digital output pin that supplies signal GPIO1111 must be capable of sourcing a current of

$$ I_{GPIO1111} \approx \frac{V_{CC}}{R28} = \frac{5\,\mathrm{VDC}}{1\,\mathrm{k\Omega}} = 5\,\mathrm{mA} $$


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R28 will help pulling the signal down "when not in use" and is therefore counter productive.

When you don't know the configuration of GPIO1111 at start up, I'd suggest using a transistor with an additional pull-up resistor instead of R28.

So,

  • remove R28 and disconnect signal GPIO1111.
  • connect pullup resistor to pin 11
  • connect e.g. a logic-level NMOS with drain to pin 11, source to gnd and signal GPIO1111 to te gate and a resistor (of 1K to 10K) from gate to ground
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