# Which characteristic of a BJT determines the timing in the following given application?

I currently face a question about the BJT circuit given here:

We see a 2N3904 transistor with constant base current of 2 mA. A switch seperates a 15 V/20 ohm source from the collector of said transistor. Before 1 µs the switch is open. After 1 µs it closes.

What I get from an LTSpice simulation and also see in real measurements is this (Y-Axis is $$\I_{ce}\$$: collector-emitter current through Q1):

The steady state current of 350 mA is determined by the current gain of the transistor. Base current is about 2 mA in the given circuit.

The peak current of 730 mA is given by (V2-Vce)/R1.

But which characteristic of the transistor determines how long the peak current (730 mA) sustains before the current falls down to steady state current (350 mA?) In this example the time is ~300 ns.

I already thought of the storage time, but it does not really fit, especially if I try different transistors in the simulation and compare the outcome with the corresponding storage time of the transitor in the datasheet. (i.e. 2N2222 has near to 0 time before the peak current decays to the steady state current.)

edit: Added needed information. edit2: Added simulation result for a 2SD2656 Transistor with rated maximum current of 1000 mA:

• So, what happens at t = 1 us? Your spice circuit isn't really telling me that and neither are your words. Your graph doesn't say what the Y axis is. Don't write a comment, fix your question. Mar 25, 2020 at 15:27
• Have you tried operating this transistor within the maximum rating of 200 mA as specified in the data sheet? Models are fine but they are not expected to deliver anything meaningful when you apply silly conditions to them. Mar 25, 2020 at 15:39
• This is just an example. I observed this behaviour with other transistors in real measurements. If i simulate this with an 2N2222 or with a 2SD2656 the behaviour is similar, just the time varies how long the peak current flows before decay Mar 25, 2020 at 15:46

Transistors are not perfect switches. They have parasitic capacitances. When a base current is applied, some of them charge up and and when base current is removed, some will discharge ($$\Cπ\$$).

A similar behavior happens when a voltage is applied to the collector ($$\Ccs\$$). This takes time, and thus the RC curve you see in your graph.

Here is an small signal model of a bjt transistor from this question

There are three capacitors in it. Try building your circuit with this model and see which capacitances most affect your graph.

UPDATE: specific to your circuit, with the base at a constant 2mA and no collector voltage $$\Vc\$$, then $$\Ccs\$$ will obtain some amount of charge. Then when the switch closes a higher voltage is applied to the collector and $$\Ccs\$$ will charge via $$\rc\$$. This charging/discharging $$\RC\$$ is most likely what you are seeing.

• Thank you very much. I'll try to evaluate the parameters which are critical for this behaviour Mar 25, 2020 at 16:27
• I figured, that the model showed in the Aarons answer is not sufficiant to provoke the behaviour in question. But i do also understand, that a transistor is a complex device which cannot be easily modeled for universal conditions. Mar 25, 2020 at 17:05
• Please note, that the base current in the case in question is steady at 2 mA, just because you mentioned an variation of the base current in your answer Mar 25, 2020 at 17:06
• @NoiseEngineer, Noted. I'll update my answer. Mar 25, 2020 at 18:26
• I also think that Ccs and rc is what defines the exponential decay. What i wonder about is the halt time at peak current. (~300ns for the example of 2N3904 and ~700ns for the example of 2SD2656). Mar 25, 2020 at 19:19