# Problems with hexadecimal table in VHDL

I want to convert from binary to hexadecimal but I found a few problems with VHDL in Quartus II.

library ieee;
use ieee.std_logic_1164.all;

(
hexadecimal: in integer range 0 to 9;
binario: out std_logic_vector(3 downto 0)
);
begin
begin
binario <= "0000";
binario <= "0001";
binario <= "0010";
binario <= "0011";
binario <= "0100";
binario <= "0101";
binario <= "0110";
binario <= "0111";
binario <= "1000";
binario <= "1001";
binario <= "1010";
binario <= "1011";
binario <= "1100";
binario <= "1101";
binario <= "1110";
else
binario <= "1111";
end if;
end process;
end comportamiento;


But when I try to compile it, it throws this error:

Error (10327): VHDL error at Hexadecimal.vhd(33): can't determine definition of operator ""="" -- found 0 possible definitions


I came to this forum at last because I tried everything. I hope you guys know how to solve this.

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• First you say hexadecimal is in the range 0 to 9. Then you check if it's equal to A, B, C, etc. I don't know VHDL, but there's probably a problem there. – The Photon Mar 26 at 5:37
• Yes that is wrong . Also you are not converting binary to hexadecimal but the other way around. Note that an integer hexadecimal number already HAS the right binary bits. All you need is to convert from integer to std_logic_vector. – Oldfart Mar 26 at 7:11