# Large signal with DC offset matching to ADC with input centered around 0V

I'm new to this forum, so plear bear with me.

I have a 0 to 23v signal coming from a transimpedance amplifier that I need to squeeze into -2.5v to 2.5v input for an ADC. The signal is first put into a buffer amplifier for a high input impedance. I've used a resistor divider to get the signal to 0 - 2V which goes to a non inverting op-amp with a gain of approximately 2 with some offset voltage applied through the feedback. (R1) this however messes a bit with the gain of the opamp which is not preferable as it lead to more tuning.

I' haven't tested this in real life, but it seems to work in simulation. Would this be any good? Are there more elegant solutions to have this functionality? No AC coupling is allowed as the signal changes very slowly. Maximum frequency is about 0.017Hz.

thanks,

Jona

You have a symmetrical power supply, so you can make use of that instead of squeezing the input signal only in the positive voltage range.

Change your voltage divider to get output values between 0 and 5V instead of 0 and 2V. Then use a summing amplifier to add -2.5V to the signal. This will give you a $$\\pm 2.5V \$$ signal.

I changed a few details in your circuit and edited in my proposal. As you can see the output of the first opamp is now significantly less loaded (only 0.5mA max in comparison to 10mA). The cut off frequency of the low pass filter is a little bit higher at 800mHz, if that is to much you can still change the values of the voltage divider or the capacitor. You probably have to finetune R5 to get an exact offset value, if that is important.

Plot over time, $$\V_{in} = 24V_{pp}\$$ with 12V offset and $$\V_{out} = \pm 2.5V\$$:

Plot over frequency, cut off frequency at 800mHz:

I left out any decoupling capacitors for simplicity, you obviously should add some in the real implementation. Also, because the resitor values became quite high, it might be benefical to add a small cap over R4 and from the inverting input to ground to reduce noise.

• Thanks for the comment. It looks interesting. I will simulate this as well. Commented Mar 27, 2020 at 8:03
• I edited in some details for the implementation. Commented Mar 27, 2020 at 12:21
• Thanks, I did already simulate something similar thanks to your earlier comment. Different resistor values, but the setup is the same. I will however use a stable -2.5v reference and tune R6 to have some variability in the offset. Commented Mar 28, 2020 at 17:25

It should function, and you probably want two op-amps if you have to have a high impedance input. I do have some comments:

Okay, starting at the input. Why so low for R6/R7? You're drawing 10mA from U1 at 23V in. Since you have a 100K resistor after it you could use 220K and 20K with 82K instead of 100K.

C2 may be a source of noise, from microphonics and thermal fluctuations, if that's important to you, particularly if it's a ceramic type.

You seem to be concerned about noise (R5/C1, R11/C4,R12/C3) and the choice of a low-noise op-amp but you are using the power supply to provide the offset??

Again on U2 the resistor values are rather low. 10x or 20x higher would be better. Perhaps you could use a precision 2.50V reference (maybe the same reference used by the ADC) to do the offset.

If you divide it down to 0-2.5V with R6/R7, and use a 2.5V reference, you can eliminate R14 and make R1/R13 both 100K.

• Noise is not the primary concern, as the ADC signals will be integrated over long period to reduce noise, but I would like the noise at the input as low as possible. Thanks for the good comments. I have a question though about changing R10 to 82k. As R10 in combination with C2 acts as a low pass filter to eliminate higher frequency noise. Why exactly would R10 need to change to 82k? C2 will be a foil cap. Commented Mar 27, 2020 at 7:53
• You know that the noise in the power supply voltage isn't necessarily high frequency? But your requirements are unstated so I'll leave that. Your RC filter sees (200||2.2K)+100K ~= 100.2K in your circuit. To maintain the same cutoff frequency I suggest (220K||20K)+82K = 100.3K. In reality it probably doesn't matter much since the cap will be +/-5% or so but if you used 100K the cutoff frequency would be a bit lower. Commented Mar 27, 2020 at 14:05
• Thanks for the clarification. I know it's a stupid question, but why are resistors 220k and 20k calculated as parallel? Commented Mar 28, 2020 at 17:29
• The op-amp output is low impedance (op-amp output with feedback so << 1 ohm) so the Thevenin equivalent is a voltage source 20/240 x the output voltage, with the parallel equivalent 220k||20k in series. Commented Mar 28, 2020 at 17:35