First a clarification: For 100Base-T if you keep the lengths short (<1") between ENCX24J600/magnetics/connector, the impedance doesn't really need to be controlled, just be in the ballpark. A high speed digital design book will explain why.
Secondly, this question needs to be answered because later on you'll want to use a faster interface, such as 1000Base-T or 10 GbE, or any other fast digital signal like 3G-SDI, or your lengths may need to be a bit longer, or you may need to route a high speed memory bus like DDR3, so what are you to do? repeat this question?
Finally, to address the issue at hand:
- Calculate (by hand, with software, etc.) what the trace dimensions should be based on a typical stackup that the manufacturer offers. If the results are plausible use that.
- If the resulting traces are not practical (too wide or too narrow), you need to specify a stackup that will work. It can become an iterative process. Start with a trace thickness that is practical for routing, spacing, manufacturability, etc. Then calculate the dielectric thickness (given a material with a specific dielectric constant) for the impedance you need. Then from real options of core thicknesses and prepreg sheets and materials, choose the closest one. Then recalculate the trace dimensions you need.
- If your software allows for it, simulate your critical lines and make sure your signal integrity is ok (this requires driver model, trace dimensions, stackup specification (distance to reference plane(s) and dielectric value), and any vias you may be using (and their dimensions). Correct as needed.
- Now you have your stackup and trace dimensions for the impedance you need, but you need to convey this information to the pcb manufacturer (which is the gist of your question).
- To specify the stackup, draw on the gerber a representation of it, specifying thicknesses. Add some notes specifying desired dielectric constant and material.
- To specify controlled impedance, since the value of the trace widths of specific impedance will be special, you can refer to them in the notes by width. Their tools will help them identify the traces easily. You can say for example:
IMPEDANCE CONTROLLED TRACES:
- 5 mil traces on top layer should be 100 ohms (+/- 20%) impedance with respect to the plane in layer 2.
In reality, the pcb manufacturer will adjust the widths to match the desired impedance, according to their internal data of the exact dielectric contants and widths that they will use to manufacture your pcb. But thanks to your calculations, it will be close to what you specified (so that things like spacing between traces, minimum widths and overall routability are not significantly affected when they make the adjustments).
A google image search yielded the following example: