4
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I have a very simple OpAmp circuit using an LM324. I used that because it is apparently the equiv of the NTE987 that I actually got from Microcenter. I was just playing around with the old school Forest Mimms Enegeers Mini Notebook series (OP Amp IC Circuits). I was trying to do circuit 1 (yes, thats right, I am having issues with the first circuit. :\ ).

Setup

I am trying to simulate the circuit using ngspice through KiCad. The schematic that I generated is the following:

enter image description here

I used the following pspice model from http://www.ti.com/product/LM324/toolssoftware

* LMX24_LM2902 - Rev. A
* Created by Paul Goedeke; November 16, 2018
* Created with Green-Williams-Lis Op Amp Macro-model Architecture
* Copyright 2018 by Texas Instruments Corporation
******************************************************
* MACRO-MODEL SIMULATED PARAMETERS:
******************************************************
* OPEN-LOOP GAIN AND PHASE VS. FREQUENCY  WITH RL, CL EFFECTS (Aol)
* UNITY GAIN BANDWIDTH (GBW)
* INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR)
* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR)
* DIFFERENTIAL INPUT IMPEDANCE (Zid)
* COMMON-MODE INPUT IMPEDANCE (Zic)
* OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo)
* OUTPUT CURRENT THROUGH THE SUPPLY (Iout)
* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en)
* INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in)
* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo)
* SHORT-CIRCUIT OUTPUT CURRENT (Isc)
* QUIESCENT CURRENT (Iq)
* SETTLING TIME VS. CAPACITIVE LOAD (ts)
* SLEW RATE (SR)
* SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD
* LARGE SIGNAL RESPONSE
* OVERLOAD RECOVERY TIME (tor)
* INPUT BIAS CURRENT (Ib)
* INPUT OFFSET CURRENT (Ios)
* INPUT OFFSET VOLTAGE (Vos)
* INPUT COMMON-MODE VOLTAGE RANGE (Vcm)
* INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm)
* INPUT/OUTPUT ESD CELLS (ESDin, ESDout)
******************************************************
.subckt LMX24_LM2902 IN+ IN- VCC VEE OUT
******************************************************
* MODEL DEFINITIONS:
.model BB_SW VSWITCH(Ron=50 Roff=1e12 Von=700e-3 Voff=0)
.model ESD_SW VSWITCH(Ron=50 Roff=1e12 Von=250e-3 Voff=0)
.model OL_SW VSWITCH(Ron=1e-3 Roff=1e9 Von=900e-3 Voff=800e-3)
.model OR_SW VSWITCH(Ron=10e-3 Roff=1e9 Von=1e-3 Voff=0)
.model R_NOISELESS RES(T_ABS=-273.15)
******************************************************


I_OS        ESDn MID -18N
I_B         37 MID -20N
V_GRp       57 MID 180
V_GRn       58 MID -180
V_ISCp      51 MID 40
V_ISCn      52 MID -40
V_ORn       45 VCLP -1.2
V11         56 44 0
V_ORp       43 VCLP 1.2
V12         55 42 0
V4          33 OUT 0
VCM_MIN     79 VEE_B 0
VCM_MAX     80 VCC_B -1.5
I_Q         VCC VEE 175U
V_OS        86 37 1.8M
R61         MID 22 R_NOISELESS 8.001K 
C16         22 23 19.89P 
R58         23 22 R_NOISELESS 100MEG 
GVCCS2      23 MID VEE_B MID  -992.9M
R57         MID 23 R_NOISELESS 1 
XU3         VCC_B VEE_B 24 25 26 27 MID PHASEREV_0
XU1         VIMON MID CRS CRS_DIST_0
C21         28 29 313.8N  
C22         30 31 636.6F  
R70         31 MID R_NOISELESS 2.5 
R67         31 30 R_NOISELESS 10K 
R66         30 MID R_NOISELESS 1 
XU2         31 MID MID 32 VCCS_LIM_ZO_0
GVCCS4      30 MID 29 MID  -4.3
R65         29 MID R_NOISELESS 3.03K 
R64         29 28 R_NOISELESS 10K 
R63         28 MID R_NOISELESS 1 
GVCCS3      28 MID CL_CLAMP 33  -90
R62         32 MID R_NOISELESS 1 
C29         34 MID 47F 
R78         MID 34 R_NOISELESS 1MEG 
GVCCS9      34 MID 35 MID  -1U
XU5         36 MID MID CLAMP CRS MID VCCS_LIM_2_EN_0
C28         38 MID 1P 
R77         39 38 R_NOISELESS 100 
C27         40 MID 1P 
R76         41 40 R_NOISELESS 100 
R75         MID 42 R_NOISELESS 1 
GVCCS8      42 MID 43 MID  -1
R74         44 MID R_NOISELESS 1 
GVCCS7      44 MID 45 MID  -1
Xi_nn       ESDn MID FEMT_0
Xi_np       MID 37 FEMT_0
Xe_n        ESDp 37 VNSE_0
C25         35 MID 47F 
R69         MID 35 R_NOISELESS 1MEG 
GVCCS6      35 MID VSENSE MID  -1U
C20         CLAMP MID 9N 
R68         MID CLAMP R_NOISELESS 1MEG 
R44         MID 36 R_NOISELESS 1MEG 
XVCCS_LIM_1 46 27 MID 36 VCCS_LIM_1_0
Rdummy      MID 33 R_NOISELESS 25K 
Rx          33 32 R_NOISELESS 250K 
R56         MID 47 R_NOISELESS 1K 
C15         47 48 1.592P 
R55         48 47 R_NOISELESS 100MEG 
GVCCS1      48 MID VCC_B MID  -100M
R54         MID 48 R_NOISELESS 1 
R49         MID 49 R_NOISELESS 4.616K 
C14         49 50 26.53P 
R48         50 49 R_NOISELESS 100MEG 
G_adjust    50 MID ESDp MID  -685.2M
Rsrc        MID 50 R_NOISELESS 1 
XIQPos      VIMON MID MID VCC VCCS_LIMIT_IQ_0
XIQNeg      MID VIMON VEE MID VCCS_LIMIT_IQ_0
C_DIFF      ESDp ESDn 1P 
XCL_AMP     51 52 VIMON MID 53 54 CLAMP_AMP_LO_0
SOR_SWp     CLAMP 55 CLAMP 55  S_VSWITCH_1
SOR_SWn     56 CLAMP 56 CLAMP  S_VSWITCH_2
XGR_AMP     57 58 59 MID 60 61 CLAMP_AMP_HI_0
R39         57 MID R_NOISELESS 1T 
R37         58 MID R_NOISELESS 1T 
R42         VSENSE 59 R_NOISELESS 1M 
C19         59 MID 1F 
R38         60 MID R_NOISELESS 1 
R36         MID 61 R_NOISELESS 1 
R40         60 62 R_NOISELESS 1M 
R41         61 63 R_NOISELESS 1M 
C17         62 MID 1F 
C18         MID 63 1F 
XGR_SRC     62 63 CLAMP MID VCCS_LIM_GR_0
R21         53 MID R_NOISELESS 1 
R20         MID 54 R_NOISELESS 1 
R29         53 64 R_NOISELESS 1M 
R30         54 65 R_NOISELESS 1M 
C9          64 MID 1F 
C8          MID 65 1F 
XCL_SRC     64 65 CL_CLAMP MID VCCS_LIM_4_0
R22         51 MID R_NOISELESS 1T 
R19         MID 52 R_NOISELESS 1T 
XCLAWp      VIMON MID 66 VCC_B VCCS_LIM_CLAW+_0
XCLAWn      MID VIMON VEE_B 67 VCCS_LIM_CLAW-_0
R12         66 VCC_B R_NOISELESS 1K 
R16         66 68 R_NOISELESS 1M 
R13         VEE_B 67 R_NOISELESS 1K 
R17         69 67 R_NOISELESS 1M 
C6          69 MID 1F 
C5          MID 68 1F 
G2          VCC_CLP MID 68 MID  -1M
R15         VCC_CLP MID R_NOISELESS 1K 
G3          VEE_CLP MID 69 MID  -1M
R14         MID VEE_CLP R_NOISELESS 1K 
XCLAW_AMP   VCC_CLP VEE_CLP VOUT_S MID 70 71 CLAMP_AMP_LO_0
R26         VCC_CLP MID R_NOISELESS 1T 
R23         VEE_CLP MID R_NOISELESS 1T 
R25         70 MID R_NOISELESS 1 
R24         MID 71 R_NOISELESS 1 
R27         70 72 R_NOISELESS 1M 
R28         71 73 R_NOISELESS 1M 
C11         72 MID 1F 
C10         MID 73 1F 
XCLAW_SRC   72 73 CLAW_CLAMP MID VCCS_LIM_3_0
H2          41 MID V11 -1
H3          39 MID V12 1
C12         SW_OL MID 100P 
R32         74 SW_OL R_NOISELESS 100 
R31         74 MID R_NOISELESS 1 
XOL_SENSE   MID 74 40 38 OL_SENSE_0
S1          28 29 SW_OL MID  S_VSWITCH_3
H1          75 MID V4 1K
S7          VEE OUT VEE OUT  S_VSWITCH_4
S6          OUT VCC OUT VCC  S_VSWITCH_5
R11         MID 76 R_NOISELESS 1T 
R18         76 VOUT_S R_NOISELESS 100 
C7          VOUT_S MID 10P 
E5          76 MID OUT MID  1
C13         VIMON MID 10P 
R33         75 VIMON R_NOISELESS 100 
R10         MID 75 R_NOISELESS 1T 
R47         77 VCLP R_NOISELESS 100 
C24         VCLP MID 100P 
E4          77 MID CL_CLAMP MID  1
R46         MID CL_CLAMP R_NOISELESS 1K 
G9          CL_CLAMP MID CLAW_CLAMP MID  -1M
R45         MID CLAW_CLAMP R_NOISELESS 1K 
G8          CLAW_CLAMP MID 34 MID  -1M
R43         MID VSENSE R_NOISELESS 1K 
G15         VSENSE MID CLAMP MID  -1M
C4          46 MID 1F 
R9          46 78 R_NOISELESS 1M 
R7          MID 79 R_NOISELESS 1T 
R6          80 MID R_NOISELESS 1T 
R8          MID 78 R_NOISELESS 1 
XVCM_CLAMP  26 MID 78 MID 80 79 VCCS_EXT_LIM_0
E1          MID 0 81 0  1
R89         VEE_B 0 R_NOISELESS 1 
R5          82 VEE_B R_NOISELESS 1M 
C3          82 0 1F 
R60         81 82 R_NOISELESS 1MEG 
C1          81 0 1 
R3          81 0 R_NOISELESS 1T 
R59         83 81 R_NOISELESS 1MEG 
C2          83 0 1F 
R4          VCC_B 83 R_NOISELESS 1M 
R88         VCC_B 0 R_NOISELESS 1 
G17         VEE_B 0 VEE 0  -1
G16         VCC_B 0 VCC 0  -1
R_PSR       84 24 R_NOISELESS 1K 
G_PSR       24 84 47 22  -1M
R2          25 ESDn R_NOISELESS 1M 
R1          84 85 R_NOISELESS 1M 
R_CMR       86 85 R_NOISELESS 1K 
G_CMR       85 86 49 MID  -1M
C_CMn       ESDn MID 2P 
C_CMp       MID ESDp 2P 
R53         ESDn MID R_NOISELESS 1T 
R52         MID ESDp R_NOISELESS 1T 
R35         IN- ESDn R_NOISELESS 10M 
R34         IN+ ESDp R_NOISELESS 10M 

.MODEL S_VSWITCH_1 VSWITCH (RON=10M ROFF=1T VON=10M VOFF=0)
.MODEL S_VSWITCH_2 VSWITCH (RON=10M ROFF=1T VON=10M VOFF=0)
.MODEL S_VSWITCH_3 VSWITCH (RON=1M ROFF=1T VON=500M VOFF=100M)
.MODEL S_VSWITCH_4 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=450M)
.MODEL S_VSWITCH_5 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=450M)

.ENDS LMX24_LM2902
*
.SUBCKT PHASEREV_0  VCC VEE VIN+ VIN- VOUT+ VOUT- MID
E1 VOUT+ MID VALUE={IF(V(VIN+,MID)<V(VEE,MID)-0.3,V(VCC,MID),V(VIN+,MID))}
E2 VOUT- MID VALUE={IF(V(VIN-,MID)<V(VEE,MID)-0.3,V(VCC,MID),V(VIN-,MID))}
.ENDS
*


.SUBCKT CRS_DIST_0  VIMON MID OUT
V1 VREF MID -40M
ESHF VSHF MID VIMON VREF 1
GZC MID ZC VALUE = {SGN(V(VSHF,MID))}
R1 ZC MID 1
C1 ZC MID 2U
GCR MID OUT VALUE = {IF((ABS(V(ZC,MID))<=0.9),0,1)}
R2 OUT MID 1
.ENDS
*


.SUBCKT VCCS_LIM_ZO_0  VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 4E3
.PARAM IPOS = 1E6
.PARAM INEG = -1E6
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*


.SUBCKT VCCS_LIM_2_EN_0  VC+ VC- IOUT+ IOUT- EN MID
.PARAM GAIN = 8.4E-4
.PARAM IPOS = 0.0048
.PARAM INEG = -0.0048
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(EN,MID)*V(VC+,VC-),INEG,IPOS)}
.ENDS
*


.SUBCKT FEMT_0  1 2
.PARAM FLWF=1E-3
.PARAM NLFF=500
.PARAM NVRF=500
.PARAM GLFF={PWR(FLWF,0.25)*NLFF/1164}
.PARAM RNVF={1.184*PWR(NVRF,2)}
.MODEL DVNF D KF={PWR(FLWF,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVNF
D2 8 0 DVNF
E1 3 6 7 8 {GLFF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNVF}
R5 5 0 {RNVF}
R6 3 4 1E9
R7 4 0 1E9
G1 1 2 3 4 1E-6
.ENDS
*


.SUBCKT VNSE_0  1 2
.PARAM FLW=10
.PARAM NLF=80
.PARAM NVR=35
.PARAM GLF={PWR(FLW,0.25)*NLF/1164}
.PARAM RNV={1.184*PWR(NVR,2)}
.MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVN
D2 8 0 DVN
E1 3 6 7 8 {GLF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNV}
R5 5 0 {RNV}
R6 3 4 1E9
R7 4 0 1E9
E3 1 2 3 4 1
.ENDS
*


.SUBCKT VCCS_LIM_1_0  VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-4
.PARAM IPOS = .5
.PARAM INEG = -.5
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*


.SUBCKT VCCS_LIMIT_IQ_0  VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-3
G1 IOUT- IOUT+ VALUE={IF( (V(VC+,VC-)<=0),0,GAIN*V(VC+,VC-) )}
.ENDS
*


.SUBCKT CLAMP_AMP_LO_0  VC+ VC- VIN COM VO+ VO-
.PARAM G=1
GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVO- COM VO- VALUE = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ENDS
*


.SUBCKT CLAMP_AMP_HI_0  VC+ VC- VIN COM VO+ VO-
.PARAM G=10
GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVO- COM VO- VALUE = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ENDS
*


.SUBCKT VCCS_LIM_GR_0  VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 0.013
.PARAM INEG = -0.013
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*


.SUBCKT VCCS_LIM_4_0  VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 1.04
.PARAM INEG = -1.04
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*


.SUBCKT VCCS_LIM_CLAW+_0  VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {ABS(V(VC+,VC-))} =
+(0, 1.17E-03)
+(0.0046251, 1.17E-3)
+(0.15716, 1.21E-3)
+(1.3309, 1.28E-3)
+(35.075, 2.12E-3)
+(35.680, 2.55E-3)
+(36.033, 2.84E-3)
+(37.416, 7.97E-3)
.ENDS
*


.SUBCKT VCCS_LIM_CLAW-_0  VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {ABS(V(VC+,VC-))} =
+(0.010, 2.50E-5)
+(0.070, 2.50E-5)
+(0.090, 5.80E-4)
+(0.100, 6.06E-4)
+(0.760, 7.14E-4) 
+(1.440, 7.62E-4)
+(8.000, 1.10E-3)
+(13.60, 1.55E-3)
+(15.45, 1.75E-3)
+(17.26, 2.15E-3)
+(18.87, 2.94E-3)
+(21.58, 4.50E-3)
+(25.53, 1.02E-2)
.ENDS
*



.SUBCKT VCCS_LIM_3_0  VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 0.435
.PARAM INEG = -0.435
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*


.SUBCKT OL_SENSE_0  COM SW+ OLN  OLP
GSW+ COM SW+ VALUE = {IF((V(OLN,COM)>10E-3 | V(OLP,COM)>10E-3),1,0)}
.ENDS
*


.SUBCKT VCCS_EXT_LIM_0  VIN+ VIN- IOUT- IOUT+ VP+ VP-
.PARAM GAIN = 1
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))}
.ENDS
*

I also ensured that use the alternative node sequence of "3 2 4 11 1". At least I think that is how this is supposed to work (you just align the PIN numbers with the sub-circuit parameter order?).

Finally, I enabled pspice compatibility mode by placing the following in my .spiceiinit file:

* user provided init file
set ngbehavior=ps

The simulation parameters were:

.tran 1u 1m

Problem (Output)

My Vout is showing an output with a bias of 3.768V. I expected the output to be 5*0.5 = 2.5V because the ratio of the feedback resistor and the input resistor was 5 and the Vin was set to oscillate around 0.5V. Apparently, the Vout does not depend at all on Vin and is just this value all the time. Here is an image of the Vout.

Humm, it will not let me upload the image? Very strange. Anyway, it is oscillating around the stated 3.768.

The spice execution model output is the following:

Circuit: KiCad schematic
Reducing trtol to 1 for xspice 'A' devices
Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
Warning: v2: no DC value, transient time 0 value used
Note: Starting dynamic gmin stepping
Trying gmin =   1.0000E-03 Note: One successful gmin step
Trying gmin =   1.0000E-04 Note: One successful gmin step
Trying gmin =   1.0000E-05 Note: One successful gmin step
Trying gmin =   1.0000E-06 Note: One successful gmin step
Trying gmin =   1.0000E-07 Note: One successful gmin step
Trying gmin =   3.1623E-08 Note: One successful gmin step
Trying gmin =   5.6234E-09 Note: One successful gmin step
Trying gmin =   5.6234E-10 Note: One successful gmin step
Trying gmin =   5.6234E-11 Note: One successful gmin step
Trying gmin =   5.6234E-12 Note: One successful gmin step
Trying gmin =   1.0000E-12 Note: One successful gmin step
Note: Dynamic gmin stepping completed
Initial Transient Solution
--------------------------
Node                                   Voltage
----                                   -------
vout                                    3.7681
net-_rf-pad2_                           1.0447
vin                                        0.5
xu1.esdn                           1.80025e-10
xu1.mid                                    2.5
xu1.37                                  1.0447
xu1.57                                   182.5
xu1.58                                  -177.5
xu1.51                                    42.5
xu1.52                                   -37.5
xu1.45                                 4.23694
xu1.vclp                               5.43694
xu1.56                                 4.23694
xu1.44                                 4.23694
xu1.43                                 6.63694
xu1.55                                 6.64173
xu1.42                                 6.64173
xu1.33                                  3.7681
xu1.79                                 2.5e-06
xu1.vee_b                              2.5e-06
xu1.80                                     3.5
xu1.vcc_b                                    5
vcc2                                         5
vee                                          0
xu1.86                                  1.0465
xu1.22                                  2.4998
xu1.23                               0.0177525
xu1.26                                 1.04665
xu1.xu3.e1_int1                       -1.45334
xu1.24                                 1.04665
xu1.27                             1.80025e-10
xu1.xu3.e2_int1                           -2.5
xu1.25                             1.80025e-10
xu1.xu1.vref                              2.46
xu1.xu1.vshf                           3.08468
xu1.vimon                              3.04468
xu1.xu1.zc                                 3.5
xu1.xu1.gzc_int1                             1
xu1.crs                                    3.5
xu1.xu1.gcr_int1                             1
xu1.28                                 152.684
xu1.29                                 37.4238
xu1.30                                 152.657
xu1.31                                 2.53753
xu1.32                                 152.619
xu1.xu2.g1_int1                         150.12
xu1.cl_clamp                           5.43694
xu1.34                                 6.65013
xu1.35                                 6.65013
xu1.clamp                              6.65013
xu1.xu5.g1_int1                         0.0048
xu1.36                                 107.165
xu1.38                                 2.50479
xu1.39                                 2.50479
xu1.40                                     2.5
xu1.41                                     2.5
xu1.xi_nn.7                           0.833786
xu1.xi_nn.8                           0.833786
xu1.xi_nn.3                                  0
xu1.xi_nn.6                                  0
xu1.xi_nn.4                                  0
xu1.xi_nn.5                                  0
xu1.xi_np.7                           0.833786
xu1.xi_np.8                           0.833786
xu1.xi_np.3                                  0
xu1.xi_np.6                                  0
xu1.xi_np.4                                  0
xu1.xi_np.5                                  0
xu1.xe_n.7                            0.833786
xu1.xe_n.8                            0.833786
xu1.xe_n.3                                   0
xu1.xe_n.6                                   0
xu1.xe_n.4                                   0
xu1.xe_n.5                                   0
xu1.esdp                                1.0447
xu1.vsense                             6.65013
xu1.xvccs_lim_1.g1_int1            0.000104665
xu1.46                                 1.04665
xu1.47                                     2.5
xu1.48                                    2.75
xu1.49                                 2.49995
xu1.50                                 1.50283
xu1.xiqpos.g1_int1                  0.00054468
xu1.xiqneg.g1_int1                           0
xu1.53                                     2.5
xu1.xcl_amp.gvo+_int1                        0
xu1.54                                     2.5
xu1.xcl_amp.gvo-_int1                        0
xu1.60                                     2.5
xu1.xgr_amp.gvo+_int1                        0
xu1.59                                 6.65013
xu1.61                                     2.5
xu1.xgr_amp.gvo-_int1                        0
xu1.62                                     2.5
xu1.63                                     2.5
xu1.xgr_src.g1_int1                          0
xu1.64                                     2.5
xu1.65                                     2.5
xu1.xcl_src.g1_int1                          0
xu1.66                                 3.76689
xu1.xclawp.g1_int1                  0.00123311
xu1.67                                0.678768
xu1.xclawn.g1_int1                 0.000678766
xu1.68                                 3.76689
xu1.69                                0.678768
xu1.vcc_clp                            3.76689
xu1.vee_clp                           0.678768
xu1.70                                 2.50121
xu1.xclaw_amp.gvo+_int1             0.00121319
xu1.vout_s                              3.7681
xu1.71                                     2.5
xu1.xclaw_amp.gvo-_int1                      0
xu1.72                                 2.50121
xu1.73                                     2.5
xu1.claw_clamp                         5.43694
xu1.xclaw_src.g1_int1               0.00121319
xu1.sw_ol                                  2.5
xu1.74                                     2.5
xu1.xol_sense.gsw+_int1                      0
xu1.75                                 3.04468
xu1.76                                  3.7681
xu1.77                                 5.43694
xu1.78                                 1.04665
xu1.xvcm_clamp.g1_int1                -1.45334
xu1.81                                     2.5
xu1.82                              2.5025e-06
xu1.83                                       5
xu1.84                                 1.04645
xu1.85                                 1.04645
b.xu1.xvcm_clamp.bg1#branch                  0
b.xu1.xol_sense.bgsw+#branch                 0
b.xu1.xclaw_src.bg1#branch                   0
b.xu1.xclaw_amp.bgvo-#branch                 0
b.xu1.xclaw_amp.bgvo+#branch                 0
b.xu1.xclawn.bg1#branch                      0
b.xu1.xclawp.bg1#branch                      0
b.xu1.xcl_src.bg1#branch                     0
b.xu1.xgr_src.bg1#branch                     0
b.xu1.xgr_amp.bgvo-#branch                   0
b.xu1.xgr_amp.bgvo+#branch                   0
b.xu1.xcl_amp.bgvo-#branch                   0
b.xu1.xcl_amp.bgvo+#branch                   0
b.xu1.xiqneg.bg1#branch                      0
b.xu1.xiqpos.bg1#branch                      0
b.xu1.xvccs_lim_1.bg1#branch                 0
b.xu1.xu5.bg1#branch                         0
b.xu1.xu2.bg1#branch                         0
b.xu1.xu1.bgcr#branch                        0
b.xu1.xu1.bgzc#branch                        0
b.xu1.xu3.be2#branch                         0
b.xu1.xu3.be1#branch                         0
h.xu1.h1#branch                    -5.4468e-13
v.xu1.v4#branch                     0.00054468
h.xu1.h3#branch                              0
v.xu1.v12#branch                    0.00479585
h.xu1.h2#branch                              0
v.xu1.v11#branch                             0
e.xu1.e1#branch                   -3.80027e-08
e.xu1.e4#branch                              0
e.xu1.e5#branch                   -1.26811e-12
e.xu1.xe_n.e3#branch              -1.99999e-08
e.xu1.xe_n.e2#branch                         0
e.xu1.xe_n.e1#branch                         0
e.xu1.xi_np.e2#branch                        0
e.xu1.xi_np.e1#branch                        0
e.xu1.xi_nn.e2#branch                        0
e.xu1.xi_nn.e1#branch                        0
e.xu1.xu1.eshf#branch                        0
e.xu1.xu3.e2#branch                          0
e.xu1.xu3.e1#branch                          0
v2#branch                            0.0005447
v3#branch                          -0.00071968
v4#branch                            -0.000175
v.xu1.xu1.v1#branch                          0
v.xu1.v_os#branch                  -7.9498e-14
v.xu1.vcm_max#branch              -9.99999e-13
v.xu1.vcm_min#branch                   2.5e-12
v.xu1.v_orp#branch                           0
v.xu1.v_orn#branch                           0
v.xu1.v_iscn#branch                      4e-11
v.xu1.v_iscp#branch                     -4e-11
v.xu1.v_grn#branch                     1.8e-10
v.xu1.v_grp#branch                    -1.8e-10
 Reference value :  0.00000e+00

No. of Data Rows : 1008

Can somebody help me understand why I am not seeing what I expected to see (an oscillation around 2.5V for Vout)?

EDIT:

I have taken the suggestions that have been provided and swapped the op-amp inputs. The schematic is now:

enter image description here

However, when I run the simulation, the graphical output of Vout is:

enter image description here

This is still not he magnitude of 2.5V which is what I was expecting. The simulation output is the following:

Circuit: KiCad schematic
Reducing trtol to 1 for xspice 'A' devices
Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
Warning: v2: no DC value, transient time 0 value used
Note: Starting dynamic gmin stepping
Trying gmin =   1.0000E-03 Note: One successful gmin step
Trying gmin =   1.0000E-04 Note: One successful gmin step
Trying gmin =   1.0000E-05 Note: One successful gmin step
Trying gmin =   1.0000E-06 Note: One successful gmin step
Trying gmin =   1.0000E-07 Note: One successful gmin step
Trying gmin =   1.0000E-08 Note: One successful gmin step
Trying gmin =   1.0000E-09 Note: One successful gmin step
Trying gmin =   1.0000E-10 Note: One successful gmin step
Trying gmin =   1.0000E-11 Note: One successful gmin step
Trying gmin =   1.0000E-12 Note: One successful gmin step
Trying gmin =   1.0000E-12 Note: One successful gmin step
Note: Dynamic gmin stepping completed
Initial Transient Solution
--------------------------
Node                                   Voltage
----                                   -------
vout                                 0.0700215
net-_rf-pad2_                         0.428352
vin                                        0.5
xu1.esdn                              0.428352
xu1.mid                                    2.5

... Truncated because of post length requirements

 Reference value :  0.00000e+00

No. of Data Rows : 1014

Any further suggestions, remember, I am very new to this, so I could be missing something very basic. Thanks for the help.

\$\endgroup\$
  • 4
    \$\begingroup\$ check the opamp input connections! You built a comparator with LOTS of hysteresis, not an amplifier! \$\endgroup\$ – Brian Drummond Mar 29 at 13:28
  • \$\begingroup\$ A simple answer for a very well written question. You get my +1! \$\endgroup\$ – Vladimir Cravero Mar 29 at 13:44
  • \$\begingroup\$ A couple of things; as the amplifier is inverting and it looks like you have a 0,.5V offset, it would swing around -2.5V. The negative supply is 0 so you cannot get the amplifier into the linear region. Try adding a -5V supply for V- \$\endgroup\$ – Peter Smith Mar 29 at 14:36
  • \$\begingroup\$ Why does V4 = 0 volts? \$\endgroup\$ – Andy aka Mar 29 at 14:38
  • \$\begingroup\$ I was doing that by setting V4 to -5V, but then the simulation fails to run with the error: doAnalyses: Too many iterations without convergence run simulation(s) aborted \$\endgroup\$ – Justace Clutter Mar 29 at 14:38
6
\$\begingroup\$

You have swapped the inverting and non inverting inputs of your op amp.

| improve this answer | |
\$\endgroup\$
  • \$\begingroup\$ Thanks for the feedback. I have updated the answer to include a follow-on situation. Unfortunately, I am still not seeing what I expected. The output is now showing a gain of 0.14 (0.07/0.5) vice the gain of -5 that I was expecting. I had to truncate some of the simulation output to fit inside the 30000 character limit. (How do people ge around that? Can I remove some of the original post?) \$\endgroup\$ – Justace Clutter Mar 29 at 14:11
  • 2
    \$\begingroup\$ @JustaceClutter If it didn't help, why did you mark the question as solved? \$\endgroup\$ – pipe Mar 29 at 15:07
  • \$\begingroup\$ @pipe It did. I did finally get the 2.5V that I was expecting. I had a slightly related question in my comments above on how to interpret the NTE987. I also flagged this answer as correct. \$\endgroup\$ – Justace Clutter Mar 29 at 15:09

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