# Is this the correct way of measuring Zi in LTSpice?

I need to simulate the parameters of this common collector npn amplifier, I've calculated Zi to be 20kOhm with BF=420 (minimum value in datasheet for the model). However the AC analysis gives me Zi of 16kOhm at most.

The transistor should be a BC547C (fairchild), but since there was only the spice model for BC547B in their website, I changed BF to the average value BF=610. For BC547B model BF=1340 (even though the datasheet has ~325), isn't the datasheet value I should use in the model?

I can't test the real circuit, so I feel blind trying to adjust values to what I can calculate...

• And to measure Zo, I should take V1 from input and put in the output!? Apr 1 '20 at 4:33

The simplest way to ac-sweep the input impedance is to insert a high-value inductance in series with the dc source and install a 1-A ac current source at the input node. The below circuit shows the idea that I use for plotting the input impedance of switching converters built with average models:

The voltage-controlled voltage source automatically sets the bias point to maintain the collector to the desired operating point, e.g. 2.4 V in this example. Then, $$\L_1\$$ ac isolates this voltage source from the rest of the circuit and what you observe in the probe VZin is the voltage image of of the input impedance as the stimulus is a 1-A current source. In your case, unless you consider parasitic capacitance, it's more a small-signal input resistance you will have, equal to the 10-k resistance in series with the dynamic resistance $$\r_{\pi}\$$ of the base-emitter junction.

For the output impedance, simply move the 1-A current source at the collector in my sketch and you'll have a voltage image of $$\Z_{out}\$$. A 1-kF capacitor can be installed after $$\L_1\$$ to ground to filter the return loop in this case.

• The OP can easily set the quiescent collector current using this with a simple change to the collector voltage set point arranged at the VCVS and readily see the differences. I'm not entirely sure about why you chose to use $R_2=R_1$ for the Zin analysis. (I'm ignoring your last paragraph talking about measuring Zout, for now.) The output capacitor needs a galvanic return for good reason -- if you decide to even keep the capacitor in the test circuit. But given that you do, why is $R_2$ chosen to be that specific value? (Assuming all you want is Zin and not Zout.)
– jonk
Apr 1 '20 at 8:23
• Hello jonk, oops, I did not see the cap. was grounded in the original schematic. I have updated my answer accordingly. Thanks for pointing this out! Apr 1 '20 at 8:40
• Things make more sense to me, now. And thanks for the added details! I can't add another +1, though. ;)
– jonk
Apr 1 '20 at 8:47
• I think things could be simplified, something like this, even in ICAP (by explicitly adding a 1$\Omega$ resistor). Apr 1 '20 at 11:56
• You mean bias the left-side terminal of $R_3$ with a 758-mV dc source through a 1-ohm resistor and ac-sweep in between? But the dc source is shorted in ac analysis (small-signal value is 0 V). That is the reason I added the 1-GH inductor. Unless I misunderstood your suggestion? Apr 1 '20 at 13:08