0
\$\begingroup\$

I have a breadboard set-up with an ATmega328P running with the internal oscillator at 8MHz (3v3).

I have burned the following fuses: H=0xDA, L=0xE2 and E=0xFF

I am using external power and USBtinyISP (6-pin ISP, with jumper off) to set fuses and upload.

I have the usual caps between every pair of power connections for the mega.

I can set fuses with no problems, but when I try to upload a program verification fails unless I set fuses first. That means that the upload procedure is 1. set fuses and 2. upload.

When upload fails, it reads the fuses and they are correct as given above.

This is a minor annoyance, but I am afraid that it is an indication that something is wrong with my circuit (or something else?).

I initially set fuses with an external 8MHz crystal connected.

Anyone familiar with same or similar problem?

EDIT: After a successful upload, I can repeat successful uploads if I do not change the code.

I tried to clean and rebuild without changing the code and it still succeeds. I then tried changing some code and hit upload (with implicit rebuild) and then it failed!

I then tried to add a comment, which should not affect the resulting binary and it succeeds as well.

Thus, it seems to be related to code changes that affects the binary to be uploaded (which makes kind of sense).

Best regards, Anders

\$\endgroup\$
2
  • \$\begingroup\$ Are you using avrdude to program? Try setting a lower CLK speed. If that doesn't helps, please post details on your usage & output. \$\endgroup\$
    – NStorm
    Commented Apr 1, 2020 at 10:46
  • \$\begingroup\$ @NStorm I am using avrdude (Platform IO). I wanted to try your suggestion of using a lower clock and to form a baseline I just tried to power cycle and upload again - expecting it to fail. It did not fail! I have updated the question with more details. \$\endgroup\$
    – Tøgern
    Commented Apr 1, 2020 at 11:13

1 Answer 1

1
\$\begingroup\$

I'm not familiar with Platform IO but since you are telling that setting a lower CLK helps, you can adjust your settings file to add option for avrdude to always program at wanted CLK speed. Check this URL for instructions: https://docs.platformio.org/en/latest/platforms/atmelavr.html#upload-using-programmer

Probably (just a guess, didn't checked that) default settings are adjusted for 16 MHz settings which is the most widespread with ATMega328p boards and especially Arduino's.

Another URL with similar error which might help is: https://community.platformio.org/t/atmega328-internal-clock/6236/4

\$\endgroup\$
5
  • 1
    \$\begingroup\$ I actually never got around to trying a lower CLK because I then noticed the behaviour described in the edit. In the Platform IO config file, for the project I have set the clock speed to 8MHz. I have previously found the site you link to and I have tried the "Upload using Programmer" option, but that did not work at the time. I just tried it again - with code changes and no power cycles - and it seems to work fine now. There must have been a fluke in the space-time continuum or something. Anyway, thanks for your help! \$\endgroup\$
    – Tøgern
    Commented Apr 1, 2020 at 21:16
  • \$\begingroup\$ @Tøgern setting F_CPU to 8MHz itself doesn't adjusts "default" avrdude settings for ISP CLK. The lower your F_CPU is the lower ISP CLK should be. It should be less than 1/8 of F_CPU. Original USPAsp can't auto adjust ISP CLK. While some China clones firmware can do this. But also the less ISP CLK is the more reliable programming can become especially when we are talking about breedboard with it's drawbacks. \$\endgroup\$
    – NStorm
    Commented Apr 2, 2020 at 7:12
  • \$\begingroup\$ When I read CLK in your first comment, I was confusing it with F_CPU. As far as I can tell there is no ISP CLK or CLK setting in the Platform IO project configuration file, but there is upload_speed, which has been set to 57600 (bauds/s) all of the time. That is way below 1/8 of F_CPU and thus should be fine, I suppose. Anyway, Upload using programmer works! \$\endgroup\$
    – Tøgern
    Commented Apr 3, 2020 at 19:36
  • \$\begingroup\$ @Tøgern this is the baud rate for UART based bootloaders. You are using SPI ISP, which has CLK as speed parameter. It's controlled by the -B avrdude switch. Try something around -B5 for a start. Also you can check this question for more information on CLK settings: electronics.stackexchange.com/questions/49606/… I'm not sure if USBtinyISP supports this setting like USBAsp but it won't hurt to try. \$\endgroup\$
    – NStorm
    Commented Apr 3, 2020 at 23:27
  • \$\begingroup\$ Ahh, I see. I have tried various values for the -B parameter of avrdude, but with no success. Upload using programmer seems to consistently work, though, so I consider the problem solved using that method. Thanks for your help! \$\endgroup\$
    – Tøgern
    Commented Apr 5, 2020 at 9:53

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.