Is it possible to have two clock signals driving a JK toggling flip flop, in which both signals are connected by a XOr gate so that the flip flop only works on either edge of either clock? If possible, then there are also two sequences for how the clock inputs will go. Assume that the clock is positive edge triggered.
For Sequence A, Phase 1 is when the clock is driven to 0 by the two low inputs. In Phase 2, the clock is driven 1 by Input 1, after which a desired flip flop output is obtained. Afterwards, in Phase 3, the clock goes back to 0 when the input combination is "11" due to the XOr gate, where the Q output will stay the same. In Phase 4, now the combination is "01" after "11", the clock is back on. Despite this, I wish to keep the output as obtained in Phases 2 and 3.
On the other hand, for Sequence B, Input 2 going high first in Phase 2 will generate a desired Q output, which is different than the one obtained in the first sequence. Similarily as in the first sequence, "11" combination will turn the clock off due to the XOr Gate. Finally, at "10" I wish to keep the same Q output as the 2nd and 3rd Phases.
It might be confusing, but is any of this possible? Thank you.