If it's SPICE world then this setup may be a bit more helpful: a current source directly in the base of the transistor, with either the emitter (for determining \$C_{je}\$), or the collector (for \$C_{jc}\$) grounded, and the results come by reading the voltage. Or a voltage source and read the current. Here's an example with 2N2222, with the emitter grounded:
You know that \$R_b\$ is in series with \$R_e\$ and \$C_{je}\$. This is a series RC which, when fed with a constant current source, becomes a PI compensator, so you know you have a corner frequency given by \$f_c = (R_b + R_e)C_{je}\$. Until \$f_c\$ it's an integrator response, afterwards it's flat. The flat portion tells you the DC voltage given by \$R_b + R_e = 10.2\textrm{V}\$ (the 1st cursor), and \$f_c \approx 624\textrm{MHz}\$ is given by reading the phase of \$-45^\textrm{o}\$ (1st order RC, cursor 2, Y-axis set to linear, for easier reading). Since the current source uses AC 1, that means that the input is unity, so there's no need to divide the voltage by the input current.
$$C_{je}=\frac{1}{2\pi\cdot 10.2\Omega\cdot 624\textrm{MHz}}=25\textrm{pF}$$
Similar for \$C_{jc}\$. The pleasure of finding out the capacitance for 2N3904 belongs to you. BTW, maybe you know, pressing Ctrl+C when a transistor model is selected in the list, will copy the .model definition to the clipboard. That's how it's pasted in the schematic.
Using this method it's easy to determine \$R_b\$, \$R_c\$, and \$R_e\$, individually, by simply reading the flat portion of the voltage from the floating pin (V(y)). Since it's a current source of \$1\textrm{A}\$, the voltage at the floating pin will be \$R_e\$, in volts (for grounded emitter), and the difference will be \$R_b\$ (V(x,y)). Similar for \$R_c\$. This works better in .AC than .TRAN:
Note the use of node labels, which makes life easier not only for me, but also for people reading the schematic. That's what I meant in the comment. Plus, the default names for nodes do change as soon as LTspice deems necessary, and it's not a bad habit to form.
V(n005)), then it is (almost) mandatory you manually rename the nodes. This is because, as you add more nodes, their names are automatically re-ordered, so what you think asV(n005), it may no longer be the case after any operation involving a modification of the nodes in the schematic. It also makes debugging easier, not to mention it makes it more clear for people reading your schematic which nodes you're referring to. \$\endgroup\$