The ideal way would be to use a digital decimator. From the datasheet, they say
The MSP430F67x, TMS320F2807x, and TMS320F2837x microcontrollers, and the AMC1210 integrate these digital filters for seamless operation with the AMC1106.
As it's only a 2nd order modulator, you don't need a high order decimator, 3rd is ideal.
To minimise the MCU workload, set the input clock frequency to the minimum of 5MHz.
One option is to convert the delta sigma output to a voltage level using a 1-bit DAC (ie a buffer) and a lowpass filter to get a continuous voltage, and sample it with the MCU's ADC. Very easy for filtering, not so good for precision.
With a fast enough processor, or with suitable MCU peripherals, you could implement your own decimating digital filter. The fastest option would be to receive the digital data in an SPI interface, parallelise the data into 8 bit bytes, and convert each byte through lookup into a pre-computed partial output of an FIR decimation filter, so you'd need three lookup and two adds at a 5M/8 = 625kHz rate, which you might just manage with an 8MHz ESP32, and certainly with something rather faster, like an M4. An alternative would be direct implementation of a Hogenhaur (CIC) filter at 5MHz (adds at 15MHz)