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The ADS4126 comes with a Double Data Rate (DDR) LVDS output interface and a enter image description here

I have following questions:

  1. What criteria is used to decide which one of the two to use?

  2. Can both be used to read the ADC at the fastest data rate of 250MSPS?

  3. Which of these is more power efficient and why?

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  • \$\begingroup\$ Datasheet will answer (2) and (3). (1) is up to you, or whoever defines your project requirements. \$\endgroup\$ Apr 5 '20 at 19:24
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What criteria is used to decide which one of the two to use?

Puh. Big question. Many?

  • What interfaces are available on the thing you want to connect the ADC to ("sink")
  • Cost and effort in terms of routing of N/2 differential pairs vs N single-ended signals
  • Ability to control substrate thickness/impedance/losses (worse for single-ended outputs; differential signals can very effectively be routed on a outer layer)
  • EMI aspects that might favor either
  • Especially, coupling of CMOS switching noise to the analog input
  • power consumption in either mode

Can both be used to read the ADC at the fastest data rate of 250MSPS?

The datasheet will tell you that. But yes, text and drawing on p. 70f seems to imply that, and nothing in the datasheet as far as I skimmed it contradicts.

Which of these is more power efficient and why?

Probably the low-voltage LVDS. Because it's lower voltage.

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  • \$\begingroup\$ The master device is an FPGA in this case. \$\endgroup\$
    – quantum231
    Apr 5 '20 at 15:58
  • \$\begingroup\$ yeah, that doesn't mean you have a lot of LVDS receivers or CMOS receivers per se, which are fast enough. It will depend on the FPGA, package variant, PCB stackup... still, which interface you'd prefer. \$\endgroup\$ Apr 5 '20 at 16:41
  • \$\begingroup\$ Due to this going into a battery powered product, going for LVDS is a better idea. However, it needs to be confirmed that the FPGA can work with the DDR LVDS data rate. In any case, I am not sure how the simulation can be performed to be sure that the PCB stack up and design is appropriate. \$\endgroup\$
    – quantum231
    Apr 5 '20 at 20:29
  • \$\begingroup\$ I think you're trying to ask a question here, sneakily disguised as a comment ;) Try to condense that question through further research and ask it as a separate question on this site :) \$\endgroup\$ Apr 5 '20 at 20:38

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