Well, I am trying to analyze the following circuit:

simulate this circuit – Schematic created using CircuitLab

When I use and apply KCL, I can write the following set of equations:

$$\begin{cases} \text{I}_1+\text{I}_4=\text{I}_2+\text{I}_3\\ \\ \text{I}_1=\text{I}_2\\ \\ \text{I}_3+\text{I}_5=0\\ \\ \text{I}_6=\text{I}_4+\text{I}_5 \end{cases}\tag1$$

When I use and apply Ohm's law, I can write the following set of equations:

$$\begin{cases} \text{I}_1=\frac{\text{V}_\text{x}-\text{V}_1}{\text{R}_1}\\ \\ \text{I}_2=\frac{\text{V}_1}{\text{R}_2}\\ \\ \text{I}_3=\frac{\text{V}_1-\text{V}_2}{\text{R}_3}\\ \\ \text{I}_4=\frac{\text{V}_3-\text{V}_1}{\text{R}_4}\\ \\ \text{I}_5=\frac{\text{V}_3-\text{V}_2}{\text{R}_5} \end{cases}\tag2$$

Substitute $$\(2)\$$ into $$\(1)\$$, in order to get:

$$\begin{cases} \frac{\text{V}_\text{x}-\text{V}_1}{\text{R}_1}+\frac{\text{V}_3-\text{V}_1}{\text{R}_4}=\frac{\text{V}_1}{\text{R}_2}+\frac{\text{V}_1-\text{V}_2}{\text{R}_3}\\ \\ \frac{\text{V}_\text{x}-\text{V}_1}{\text{R}_1}=\frac{\text{V}_1}{\text{R}_2}\\ \\ \frac{\text{V}_1-\text{V}_2}{\text{R}_3}+\frac{\text{V}_3-\text{V}_2}{\text{R}_5}=0\\ \\ \text{I}_6=\frac{\text{V}_3-\text{V}_1}{\text{R}_4}+\frac{\text{V}_3-\text{V}_2}{\text{R}_5} \end{cases}\tag3$$

Now, I have an ideal opamp, so I know that $$\\text{V}_+=\text{V}_-=\text{V}_2=0\$$. So I can rewrite equation $$\(3)\$$ as follows:

$$\begin{cases} \frac{\text{V}_\text{x}-\text{V}_1}{\text{R}_1}+\frac{\text{V}_3-\text{V}_1}{\text{R}_4}=\frac{\text{V}_1}{\text{R}_2}+\frac{\text{V}_1}{\text{R}_3}\\ \\ \frac{\text{V}_\text{x}-\text{V}_1}{\text{R}_1}=\frac{\text{V}_1}{\text{R}_2}\\ \\ \frac{\text{V}_1}{\text{R}_3}+\frac{\text{V}_3}{\text{R}_5}=0\\ \\ \text{I}_6=\frac{\text{V}_3-\text{V}_1}{\text{R}_4}+\frac{\text{V}_3}{\text{R}_5} \end{cases}\tag4$$

But this system contains a contradiction so it is impossible to solve. Where is my mistake?

• What is the logic to determine that I1 and I2 are equal? Apr 5, 2020 at 20:58
• @Justme That implies that there is no current flowing into or out of the plus terminal of the opamp. Apr 5, 2020 at 20:59
• Are you sure about that? If you claim I1 and I2 are equal, then from that follows that I4 and I3 are equal as well. I1 can't equal to I2. Apr 5, 2020 at 21:04
• I'm with justme on this one. Apr 5, 2020 at 21:10
• @Justme why is it correct to say that I3+I5=0 And when I write the node at the ground as I2=I1 it is wrong? Apr 5, 2020 at 21:11

The error is in the assumption the I2 = I1.
The OpAmp can (in general) sink and source current.
When it would be sourcing current, this current would have to go to ground, either through R2 or through R1 (less likely).

The current through R2 returns to Vx as well as to the negative power terminal of the source that sources the OpAmp.

Note you cannot omit the power terminals: an ideal OpAmp has no current entering its input terminals. If a current would enter or leave the output terminal, this would conflict with KCL: current cannot be created or eaten by an OpAmp.

• First of all, thanks for your answer. This leads to another question I have: so what does KCL say at the node with the ground symbol? Apr 5, 2020 at 21:08
• Let me ask another question: what would KCL say about an opamp where no currents enter it through the inputs, but a current leaves the component at the output? Apr 5, 2020 at 21:10
• I don't know..... Apr 5, 2020 at 21:12
• The current through R2 'returns' to Vx as well as to the negative power terminal of the OpAmp. Apr 5, 2020 at 21:15
• Oh, OK. Took me a long time to get it. You can't sum the currents going into ground in this type of problem because there are assumed connections to ground that are not shown in the diagram. So that is why you cannot assume I1=I2. I upvoted the original question because this is an important and subtle point. Apr 5, 2020 at 22:11

The numerous intermediate stages and the already mentioned faulty assumption I1=I2 create errors.

The assumption opamp output is a controlled voltage source which sets V3 so that V2=0 is the common virtual ground principle and it's well acceptable (by assuming a stable by feedback balanced state exists)

Node equations are more straightforward to write directly with conductances G=1/R. Also the fact V2=0 is good to include in the beginning.

At node 1 we get for the sum of departing currents:

(V1-Vx)G1 + (V1-V3)G4 + V1G2 + V1G3 = 0

At node 2 we get for the sum of arriving currents:

V1G3 + V3G5 = 0

We do not have more independent equations because all non-voltage source nodes are used. If we eliminate V1 we will have one equation which gives ratio V3/Vx and that's the voltage gain of the circuit.

The output of a "near-ideal" op amp will be(gain * (nonInv-inv+(constant/gain))), with the gain being maximal and the constant being dwarfed by the gain. In a meaningful ideal circuit, each node's voltage will monotonically and asymptotically approach some limiting value as gain approaches infinity, and the ideal voltage at each node will be that value.

It's possible to have a circuit whose behavior will not asymptotically approach a limit as gain increases but will remain sensitive to increasing gain, or will behave in substantially non-monotonic fashion. In such cases, simplified ideal-circuit equations which ignore gain in such cases will often have no solution, or may have multiple solutions; even when a solution exists, it might not be meaningful. For example, if one connects the non-inverting input of an op amp to the output, and the inverting input to a signal, the "ideal" equation would suggest that the output should match the signal, but the formula with gain would not yield any kind of convergence as gain approaches infinity, and thus the "ideal" equation result should not be viewed as meaningful.