I'm trying to understand the shutdown circuitry behind the Atmel 9x60 Evaluation Kit:
So for normal operation, J3
is OPEN
.
The processor drives SHDN
high (which I assume means "run"), the following happens:
Q3
conducts, causing theSTARTB
line to go toLOW
.Q4
loses the gate voltage, causingPOWER_EN
to goHIGH
.Q5
also loses gate voltage, causingMIC2800_nRST
to goHIGH
.
But when J3
is CLOSED
, POWER_EN
will remain HIGH
as well as MIC2800_nRST
, regardless of how SHDN
is driven. (Obviously this would mean that the MIC2800 remains in power-enabled and keeps the power rails active).
The confusing part for me is that MIC2800_nRST
is shown as an output from the MIC2800-G8YSML:
Does this mean that the shutdown circuit and the MIC2800 both drive the MIC2800_nRST
line? In this case, why is Q5 there? POR in the MIC2800 is an open-drain output. Assuming that J3 would always be OPEN
, it doesn't seem to serve any purpose since driving POWER_EN
low will remove power from the rails and turn the processor off anyway. It looks like it just makes sure it is either a weak pull-up or a strong pull-down.