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I'm trying to understand the shutdown circuitry behind the Atmel 9x60 Evaluation Kit:

enter image description here

So for normal operation, J3 is OPEN.

The processor drives SHDN high (which I assume means "run"), the following happens:

  • Q3 conducts, causing the STARTB line to go to LOW.
  • Q4 loses the gate voltage, causing POWER_EN to go HIGH.
  • Q5 also loses gate voltage, causing MIC2800_nRST to go HIGH.

But when J3 is CLOSED, POWER_EN will remain HIGH as well as MIC2800_nRST, regardless of how SHDN is driven. (Obviously this would mean that the MIC2800 remains in power-enabled and keeps the power rails active).

The confusing part for me is that MIC2800_nRST is shown as an output from the MIC2800-G8YSML:

enter image description here

Does this mean that the shutdown circuit and the MIC2800 both drive the MIC2800_nRST line? In this case, why is Q5 there? POR in the MIC2800 is an open-drain output. Assuming that J3 would always be OPEN, it doesn't seem to serve any purpose since driving POWER_EN low will remove power from the rails and turn the processor off anyway. It looks like it just makes sure it is either a weak pull-up or a strong pull-down.

Datasheet for the MIC2800

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By setting jumper J2/J3 the user can shut down the MPU without powering down its power rails

This is precisely the use case it's there for - you can put the processor in a low power shutdown state without powering down anything else that might need those supplies.

The POR pin on the MIC2800 is an open drain output and requires a pull up or pull down. When !SHDN, it will be pulled high through R17. Per the datasheet, POR will go low if either/both of the outputs goes out of regulation. Therefore, you can monitor the MIC2800_nRST signal to check the regulator output is healthy. When SHDN is set, obviously the supply will be out of regulation (as it's off), so it gets pulled low by Q5.

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