# Microstrip linear taper effectiveness

I'm trying to optimize the behavior of a DC series blocking capacitor at microwave frequencies (my signal range is from $$\5.3-5.9\,\text{GHz}\$$). By optimize I mean keeping $$\S_{11}\$$ as low as possible in the signal range. One of the strategies I've considered is using a taper to transition between the microstrip width ($$\0.38\,\text{mm}\$$) and the blocking cap width (0402 cap, so $$\0.5\,\text{mm}\$$). I've seen the Klopfenstein Taper mentioned, but also a simple linear taper as a rough approximation to the Klopfenstein taper (for instance in the Transmission Line Design Handbook by Wadell, section 5.5). I've also seen linear tapers in a professionally-designed $$\18\,\text{GHz}\$$ VNA. In any event I decided to simulate the performance of several iterations of a simple linear taper on a step width discontinuity (i.e. no blocking cap) in a microstrip using OpenEMS. The step discontinuity has a width of $$\0.5\,\text{mm}\$$ and length of $$\1\,\text{mm}\$$. I've placed a taper on each side of the discontinuity, where the taper angle varies from $$\10^\circ\$$ to $$\90^\circ\$$ (i.e. no taper) in $$\10^\circ\$$ increments. Here's a bird's eye view diagram for a $$\10^\circ\$$ taper, in case the explanation wasn't clear.

The blue/purple is the PCB substrate and everything else is conductive, planar trace. It's all the same material, ignore the fact that it's several different colors.

Surprisingly, all tapers were worse than the non-tapered version for all frequencies in the simulation range ($$\\text{DC}-18\,\text{GHz}\$$). The difference between all iterations was small. Here's a plot of $$\S_{11}\$$ for two different tapers and the non-tapered version. I've omitted the other tapers from the plot because they're all in the range bounded by the $$\10^\circ\$$ taper and the non-taper and just clutter the plot.

Is this expected behavior? I was surprised when I got this result. Does this mean I shouldn't use linear tapers? Are there certain circumstances where they are effective?

Bear in mind that while I believe the simulation code is correct, there's always the possibility I introduced a bug somewhere. So, if this result is different from what you've seen in HFSS or CST etc., then this result may be erroneous, which would be useful to know.

• All of your tapers are very short compared to your signal wavelength. So making the angle smaller just increases the length of the mismatch (i.e. increase the total excess capacitance). Commented Apr 11, 2020 at 15:32
• FWIW the usual way to match a wide component pad is to cut away some of the ground beneath it, reducing the capacitance from the pad to ground. Commented Apr 11, 2020 at 16:10
• @ThePhoton that makes sense, and thanks for the pointer about the cutout. So, would a taper only be used where it doesn't increase the discontinuity length? The case I'm imagining is an interface with an IC pin, where the microstrip is wider than the pin so either a narrow segment or taper could be used. Commented Apr 11, 2020 at 17:01
• I've never used one myself. I'd guess some places you'd use them are in high-power systems, and when you're transitioning to a new $Z_0$ and the final termination will match the new $Z_0$. (Note: per Microwaves101 the taper must be nearly 0.5 wavelengths long (or longer) to work well.) Commented Apr 11, 2020 at 17:17

In your case, your wavelength is about 35 mm (for 6 GHz with velocity factor 0.7), and the length of your taper is about 0.5 mm, so you're well on the left side of the graph, where the taper provides no advantage. Even at 18 GHz, the wavelength is about 12 mm, and your taper length is still below $$\\lambda/20\$$, so you should not expect any advantage.