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The circuit below represents the JFET stabilized Wien-bridge oscillator. enter image description here

we add another diode in the circuit. Shown in the picture below:

enter image description here

The questions are:

  1. Before adding the second the diode the voltage at the input and output where smaller, why was that?
  2. Why positive side of the capacitor C3 was connected to ground?

For the first question the answer I thought was that the negative excursion of the output signal forward bias the diode causing the capacitor to increase the drain-source resistance if the JFET and reduce the gain.

For the second question the answer I thought was that the output signal forward-bias D1 causing C3 to charge to a negative voltage, thats why the negative side of the capacitor should be connected to the circuit and the positive side to the ground.

I am not sure if these answers are correct. Can someone help me with this?

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The JFET controls the magnitude of the sinewave being produced by the oscillator. You need amplitude control to keep the sinewave from growing ever bigger and hitting the saturation points of the op-amp and clipping.

The JFET naturally conducts without any gate bias and, to reduce its conduction (decrease the gain) you need to bias the gate negatively with respect to its source. Given that the source is connected to ground, you will expect to see a negative voltage on the gate and hence when you ask this: -

Why positive side of the capacitor C3 was connected to ground?

That should be clear. In addition to that the diode (D1) only conducts when the op-amp output is negative hence, D1 and C3 conspire to produce a voltage at their common node that is the peak of the negative swing of the sinewave output. Should the sinewave amplitude increase a tad, then the JFET conducts less and the gain is reduced.

Before adding the second diode the voltage at the input and output where smaller, why was that?

With one diode, there is less of a volt drop and so the sinewave amplitude needed to "activate" the JFET is smaller. With the 2nd diode, the amplitude has to grwo a bit bigger before amplitude stabilization occurs.

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1) The increase in output voltage necessary to forward bias the two diodes has a larger effect on the output amplitude than the small reduction in gain caused by taking the jfet's gate just 0.7V more negative.

2) you are correct. The negative side of C3 is taken negative (with respect to ground) on the negative swings of the output. This is necessary because the JFET's gate must be taken negative (with respect to the source) to increase the source-drain resistance of the JFET and reduce the gain. So the larger the output amplitude gets, the more negative the gate goes and the smaller the gain is.

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  • \$\begingroup\$ If I am understanding the 1st correctly: it means that the voltage reduction that the diode create have a larger effect on the output voltage rather than the reduction that the jfet causes \$\endgroup\$
    – Kasiopea
    Apr 14 '20 at 7:05

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