I am using the FT801 (datasheet) to drive a Newhaven 4.3" TFT display (datasheet). The TFT datasheet specifies the normal timing parameters (hsync/vsync peroid, front porch, back porch) on page 6. However, the FT801 video driver datasheet (pg 37-42) defines timing registers that are named very differently (HSYNC0, HSYNC1, HOFFSET).I am not clear on the relationship between these two different sets of timing parameters. Could someone please clarify this?
FT801 Registers
VSYNC1: The value of these bits specifies how many lines for signal VSYNC takes at the start of new frame
VSYNC0: The value of these bits specifies how many lines for the high state of signal VSYNC takes at the start of new frame.
VOFFSET: The value of these bits specifies how many lines takes after the start of new frame.
VCYCLE: The value of these bits specifies how many lines in one frame.
HSYNC1: The value of these bits specifies how many PCLK cycles for HSYNC during start of line.
HSYNC0: The value of these bits specifies how many PCLK cycles of HSYNC high state during start of line.
HOFFSET: These bits are the number of total PCLK cycles per horizontal line scan.
HCYCLE: The value of these bits specifies how many lines in one frame.