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I recently started to start working on a project where I started using a half-bridge to turn on and off a device that normally plugs into a wall outlet (120 VAC, 60 Hz). In the future, I am looking to use two of these in an H-Bridge configuration, but for simplicity, I am just using a half bridge for now.

As I was designing the circuit, I started to think of a potential issue regarding the power-up state of the half bridge. When the device is powered up, and the biases for the gate driver / half-bridge are brought up, I was concerned that I might not know the ON/OFF state of each FET. To combat this, I was considering adding a relay to the circuit supplying the voltage to the half-bridge so that I can let all of the low-voltage control circuitry power up, and after I can establish the state of the half bridge, then I flip the relay to supply the voltage to it as show below (please ignore the values on the FET's):

enter image description here

Here is what I was wondering:

Is this really necessary? Is this dangerous to do, as the FET's have some drain to source capacitance, so could this potentially temporarily cause a surge on the 170V rectified AC wall voltage signal? I considered trying to solve this with either a choke/low valued resistance on the 170V input, but again if this is a non-issue, than I won't worry too much. I have a prototype of this device made, and I powered up without the relay with no issue, but I want to make sure I was not just getting lucky, and now I am just waiting for this thing to fail.

If it helps at all, these are the gate driver and FET's that I am using:

FET - IRLS640A

Gate Driver - FAD6263M1X

Thank you so much!

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  • \$\begingroup\$ Unrelated to your main question, but why select a logic-level FET when you get a gate driver that needs 10-22V to drive the outputs? \$\endgroup\$
    – W5VO
    Commented Apr 14, 2020 at 22:11
  • \$\begingroup\$ I honestly didn’t even realize it was a logic level FET, I sorted parametrically on Digikey and that was one of the cheaper ones for my project. \$\endgroup\$ Commented Apr 14, 2020 at 22:16

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The gate driver already takes care of this with a POR. Check the datasheet : p13. The gate driver also has a shutdown, so that is active low. So just make sure to keep it low until your ready to “start”.

Make sure to have some gate-source pulldown resistor otherwise, the gate will be charged via cgd of the MOSFET. (Since the gate driver outputs will be floating).

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