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For my design, I am using the ICM-20689. The pinout for the chip is taken from the datasheet:
Once I get to the bottom of the datasheet, I notice that there is a bottom-mounted pad that is not mentioned anywhere else in the datasheet.
On the manufacturer's website, they have a link to SnapEDA for the PCB footprint and there is no bottom-mounted pad here either.
So, is there a reason why they would manufacture the chip with a bottom-mounted pad that is not supposed to be used?
A few reasons.
1 | these packages are standardized. They come in big grids called lead frames, and the packaging factory will place the die-stack provided on the lead-frame and bond it out as directed. If that packaging house already has a lot of QFN products with the bottom metal pad, it might be easier and cheaper for them to just stick to using that package even if there is no need for it. (the package itself has this ground plane because other components might need it, see Niel_UK's answer)
2 | There might be a standardised footprint for these kinds of components. Say TDK has a whole line of IMUs. It could be interesting for them to have a lot of versions come in the same package with compatible pinouts. Maybe a higher-end model has that bottom pad for ground because it needs it, and uses the other NC pins for communication. Maybe an older version needed more supply rails. If you as designer used that part, you might be able to just drop in this part into the previous part's footprint, not populate the voltage regulator components, and continue using the same board layout as you did for the older version, cutting down on your design time.
3 | Testing in the factory: The pads that are marked NC, along with the bottom pad, might be used for in-factory testing. I know this is done with other types of components, where NC pads are actually bonded to the die and used in the factory to feed in calibration data to the IC. The NC pads are then either just left to whatever, or the factory can disconnect them electrically after calibration (through on-chip fuses for example).
4 | Finally, but I am not sure about this: The chip in question is an IMU. I would imagine it could use with higher mechanical stability when connected to the PCB, and perhaps for that reason the big bottom pad is used.
The 'must use' scenarios for a bottom pad needing soldering are for 1) high power applications for heat-sinking, 2) RF applications which need a solid electrical GND connection and 3) high current applications where the pad is one of the electrodes.
This device is low power, low frequency, low current, so meets none of those.
Why does the package have a large pad?
Perhaps it's a standard package, and it would cost more to design a package without the exposed pad, than it costs to use it, if indeed it is more expensive than a package with no pad. Bear in mind the way many ICs are made, with a metal frame that defines the pins, which are then separated later in the process. Leaving the pad part of the frame in place may well be cheaper than removing it.
This is a very thin package, intended no doubt for space constrained application like smartphones. Any insulation or mold material over the exposed pad on the bottom would make the package thicker.
I'm intrigued by their 10,000g shock specification. If I was designing with it, I might be inclined to ask them whether soldering the pad down has any influence on that spec.
Usually the pad provides an electrical and thermal ground. In this case it’s not necessary.
If the chip is applied on the bottom side and the SMT reflow is done in one step, chips with a small number of leads like this one can fall off.
The center pad allows adding a pattern to the board for extra solder paste to hold the chip onto the board during reflow. When the extra paste melts, the added solder creates more total surface tension to hold the chip in place. This is preferable to using adhesive as it saves a manufacturing step.
Datasheets for similar device AT90CAN128-UM where it is recommended to implement the pad for mechanical strength only.
