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I'm working on I2C master driver for interfacing a particular peripheral. The problem I have, is that when the 9th clock arrives, the slave device doesn't pull down the SDA line.

I checked the signals with a scope, and everything looks like fine. the address is fine. I'm not using external pull-up resistors, I'm using the internal pullup capability of my MCU (EFM32GG).

I'm not an electrical engineer, and my experience is from the software side, so this question may be silly, but is there a chance that the device can't pull down the line because the pull up drive is too high ?

Can there be another explanation for this problem (except for the obvious one, that the slave chip is dead)?

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  • \$\begingroup\$ It's also possible that you've got the slave address wrong, or the device is in a NAK state, or your clock is too fast. What's the device? What's the strength of the internal pullup? \$\endgroup\$ – pjc50 Nov 20 '12 at 17:33
  • \$\begingroup\$ @pjc50 The clock is the lowest possible on EFM32 (93458Hz), the address is also as specified by the datasheet. what's a NAK state ? \$\endgroup\$ – Mellowcandle Nov 20 '12 at 17:41
  • \$\begingroup\$ I just debugged a problem where I needed about 1 uS from the falling edge of SCL to a change of SDA. Definitely not according to I2C spec, but that's what was needed to get it to work. \$\endgroup\$ – user3624 Nov 20 '12 at 17:57
  • \$\begingroup\$ NAK state: I meant that the device might genuinely not be ready for some reason. Without a datasheet for the slave device I don't know if that's possible. \$\endgroup\$ – pjc50 Nov 21 '12 at 10:00
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With the scope, you should see some sort of effect on the data line, even if the line is being pulled up too strongly. It may drop only half a volt or something, not enough to be read as a zero.

There's also the possibility of the slave address being wrong. Sometimes the address is specified as 7-bit and sometimes as 8-bit. The latter will be 2x the former. Free advice: Write a loop to try all the addresses and stop if it finds one that responds.

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    \$\begingroup\$ No, IIC addresses are 7 bit, never 8 bit. There is also a extended standard that uses a second address byte and therefore has a wider address (11 bits?), but this is definitely more than 8 bits, -1. But +1 for the advice to try all addresses in a loop, so we'll call it even. \$\endgroup\$ – Olin Lathrop Nov 20 '12 at 20:43
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    \$\begingroup\$ I was referring to the "7 bit, but they shift it left one to leave room for the R/W bit" business. They'll happily tell you the EEPROM is at 0x50 where the rest of the world will say 0xA0. Of course, it is subject to the context it is used in. \$\endgroup\$ – gbarry Nov 20 '12 at 21:17
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    \$\begingroup\$ I concur with gbarry, many datasheets will specify an 8-bit read and an 8-bit write address, which is nothing more than the 7-bit address plus the RW bit either set or cleared. \$\endgroup\$ – apalopohapa Nov 21 '12 at 8:19
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I would guess that what you mean by "pull up drive too high" in this case would be that the internal pull-up resistor would be too small. This is highly unlikely. You can make sure of this by switching on the pull-up and making the pin an input. Then just put a resistor from the pin to ground, you can calculate the internal pull up resistance with the voltage divider equation. Remember 'large pull-up resistor' = 'weak pull up'.

The most likely problem is a wiring issue, like swapping SDA/SCL when hooking up the peripheral or not having a common ground.

Second most likely would be the timing. Check the I2C timing diagram of your slave device (should be in the data sheet) and make sure that it's being met by measuring with the scope.

Finally, if it is not any of these other things, you may actually have a dead slave chip. Can you test another one?

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There are two major components to make this work, the physical electrical interface and the logical data that is sent.

On the electrical side, the master by itself at least seems to be operating correctly if you see on a scope that the signals are good. Since you haven't provided plots, we can't tell if they are really good or whether you have a misconception what good is. On the slave side, yes, the pullups need to be weak enough to allow the slave to pull the SDA line low. If I remember right, the IIC spec says the slave only needs to sink 3 mA to bring the line below the maximum logic low level. If you are using 5V logic, for example, then this means the pullup can't be less than 5V / 3mA = 1.7 kΩ, so a 2 kΩ resistor would be a reasonable choice. Look at the specs for the internal pullup that you are using and make sure it can't source more than 3 mA. If it can, they you can't use it and have to use a external pullup.

On the logical side, you have to make sure the slave is being properly addressed. The IIC sequence should start with both lines high, then a start condition, which is SDA going low before SCL going low. After that for each bit SDA should change to the new value, then SCL go high, then SCL low again. The first 7 bits are the address, then the read/write bit. For the ninth bit, the master leaves SDA floating and the slave should pull it low soon after SCL goes low.

In my experience, the most common cause of not getting a response from the slave is incorrect address.

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