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I could imagine the CMOS Bios Battery circuits are quite similar on all recent mainboards.

What does it look like and how does it work?

Background:

My mainboard started draining the bios battery (an ASRock H55M). I inserted a fresh battery with 3.3v. It only measured 2.9V when I removed it, after the PC had been turned off for about 8 hours. While booting, the BIOS is showing the error message "CMOS Setting Wrong" in combination with "CMOS Date/Time Not Set". My suspicion is, that the battery voltage - while being drained by the mainboard - likely dropped below the 2.9V and caused the error.

So started wondering what could have failed and what this circuit would look like.

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  • \$\begingroup\$ I would be surprised if any recent motherboard had battery-backed CMOS memory. I thought they had transitioned to EEPROM years ago. \$\endgroup\$ – Elliot Alderson Apr 17 '20 at 11:29
  • \$\begingroup\$ @ElliotAlderson - You are absolutely right. EEPROM with spi interface are now commonly used. Somehow however the term CMOS survived. I think only the RTC part is powered by the battery. Could somebody confirm? \$\endgroup\$ – 0laf Apr 17 '20 at 13:38
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The battery backup circuit is the battery OR'd with a feed from the 5V standby line via 2 diodes (usually regulated down to 3V),

So that while there is power from the power supply (plugged into the wall and switched on at the back) it does not consume any of the battery capacity,

It is only when the wall power is gone that it begins consuming capacity from the watch battery, this is why they tend to last longer in computers that are regularly used, as its essentially only self discharge (the shelf life) that determines when it will run flat

As to why your battery voltage is falling so quickly, its possible that something is partially shorting out the battery and discharging it (it could be flux residue or some dust buildup on the PCB across the contacts) in all other use cases it should take atleast a month to bring the voltage near 3V, (not much capacity in that top 0.3V)

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