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I am working on a project with some 8-bit D-Flip-Flops (using CMOS logic), feeding the first output into the second, the second into the third, and so forth. Only one of the D-Flip-Flop outputs should be on at any given time.

I believe I've set everything up properly, but there are two inputs to the first cell: the microcontroller, which can drive it arbitrarily high or low, and the cascaded output from the last cell, so it can loop indefinitely.

I didn't want to run into trouble where I was driving competing signals into this "bus" (I.E, low from the microcontroller but higher from the cascaded output), so I placed a diode (1N4148 IIRC) pointing from the source to the input pin of the D-Flip-Flop. So to clarify, I have the following:

Microcontroller -> Diode -> Input pin Final Output -> Diode -> Input pin

I figured this would help avoid problems. Unfortunately, it seems to be doing something different. Even when (and I've measured carefully) both inputs (the microcontroller AND the final output) are LOW, the input remains HIGH once it has been set high by either one of the inputs.

Why is this happening? My initial guess it just the input capacitance of the pin holds that charge there, but I would think that would eventually dissipate (but it doesn't seem to, even after a number of uS (haven't tested it longer, but that's already too long for my application)). When I added a pull-down resistor of 100K, it began working as intended. I'd rather avoid putting more hardware (even just a pulldown), but I really want to make sure I'm understanding exactly what's happening before I make design changes.


  • \$\begingroup\$ please use the schematic editor to include a schematic diagram of your circuit \$\endgroup\$
    – jsotola
    Apr 18, 2020 at 1:18
  • \$\begingroup\$ An actual schematic works a lot better than some text description, there is a circuit editor in the question, can you edit and add it? \$\endgroup\$
    – Ron Beyer
    Apr 18, 2020 at 1:18
  • \$\begingroup\$ Is that what you were after? Never used that circuit builder before... \$\endgroup\$
    – Helpful
    Apr 18, 2020 at 1:29

1 Answer 1



Add a pulldown resistor to discharge the parasitic gate-source capacitance of the input MOSFETs of the flip-flop.

It can't drain backwards through the diodes when the anode of D1 and D2 go LO so once charged HI it stays HI.

  • \$\begingroup\$ Thank you for verifying! I thought that was the case but I wanted to be sure. I've actually moved away from diodes/pulldowns and tried a design with OR gates. Not sure which one I'll settle on in the end, but I'm pretty sure this will work. \$\endgroup\$
    – Helpful
    Apr 18, 2020 at 7:26
  • \$\begingroup\$ Diodes and pull-up/down resistor add a lot of static power drain, while real gates don't so much. I would use a gate. It is much faster, too, compared to the RC network of resistor and parasitic capacitors. \$\endgroup\$ Apr 18, 2020 at 8:52

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