Fast opto-isolation with open collector output without VCC

Question

I have a two wire communication channel, with a data line and a ground line, with the data line being pulled high via a resistor on the receiving end. I am supposed to send information on this line by connecting the data line to the ground. There are also other devices on the bus which may be transmitting at other times, so the data line is not always high. The data line normally has 5V, but I don't have a separate VCC output line.

I am allowed to leak 30 µA to the ground when I'm not sending and I need to sink atleast 15 mA to the ground when I am sending. Communicating on the line should be done by some isolated circuit.

A simple phototransistor output opto-coupler fits the bill perfectly. One combined with a suitably selected base resistor will reach 1-2 µS switching times.

However, there are a few things I do not like in this solution:

• If I need to sink 15 mA and still stay fast, I need to use a lot of current to achieve that: opto couplers with a high CTR tend to be slower and requiring a high CTR is problematic if one wants to have equipment that will still work in 10 years without problems.

• All the parts need to be selected just right to meet the specifications. If an input or output voltage is suddenly different (because a manufacturer does not adhere to specifications), it is likely that some resistor is too large or too small. It is hard to get wide enough margins for everything to deal with such events.

• The switching time is adequate, but I'd love to get a solution that would be really fast. Getting under 1 µs would be great, 100 ns would be splendid!

So, I am wondering if there is some combination of simple components that would allow me to achieve faster, lower supply current and a more robust solution.

All the faster opto isolators tend to require the VCC input or simply do not work with open collector outputs. There are some with fast switching times and supply power requirements in the µA range, so I have been toying with the idea of just pulling VCC from the data line and keeping a capacitor to tide over the times some other device is pulling the line low. This would be kind of like 1-wire bus. However, such couplers would need to be coupled with a transistor or FET to achieve the needed sink current and I am guessing that might negate all my speed advantage and make the design difficult.

I also toyed with the idea of using ADuM5201, which provides isolated power as well as a high speed data link. That combined with a suitable FET might do the trick. However, such chips are somewhat complex beasts, requiring bypass capacitors, extended pads as heat sinks, large supply current at start up, and EM emission considerations.

So, I am wondering if anyone has a cool solution, maybe something with modern components as I believe most of the advanced opto coupler stuff was done when many things were a bit more primitive.

Thank you in advance.

Answer 1

A couple of thoughts:

1. To make an opto's output transistor switch on hard, quickly, you need to put a lot of current into the LED briefly, but I don't know that you'd have to keep it on that hard. I would think that driving the LED briefly with a higher current and then using a lower current to hold it might be helpful; if the time between cutting back on the holding current and switching it off altogether was sufficient, that reduced holding current could help the transistor switch off more quickly.
2. It might be helpful to add some circuitry on the output side of your opto. You may have to switch 15mA, but that doesn't mean the opto has to do so. If you will only have to start asserting the output when it's high (meaning you won't have to do things like stretch pulses which originate with other devices) and won't have to hold it too long, you could perhaps use an NFET, a diode, a small cap, and two optos. One opto would connect the gate of the NFET to the drain via diode. The other would connect it to the source. The drain would have a small cap to the source to maintain the gate voltage while the NFET is on. To start asserting the output, one would pulse the opto connecting the gate to the drain. To stop asserting it, one would pulse the opto connecting the gate to the source. When the device is idle, one should drive the latter opto just enough to overcome any possible leakage through the former. There are many possible variations on this circuit; having a "supply" capacitor may be better than having a capacitor on the gate, but putting the capacitor on the gate would probably yield more consistent behavior (since the capacitor would always start discharged when one started to assert the output, and since releasing the output would not require charging the cap).

Depending upon how much voltage drop you can tolerate, other approaches may be workable as well. For example, you might be able to use an opto together with a BJT to form a Darlington arrangement, but use a second opto to accelerate the turn-off behavior. Such an approach would have a much higher voltage drop than the MOSFET-based approach, but would eliminate any need for a capacitor.

Answer 2

Unfortunately physics dictates a tradeoff with CTR and speed If you can't make it with this. Change the requirements.

Top signal diode charges up C to become Vcc and biases the internal photodiode to the external bus voltage peak to store voltage for low duty cycle communication on the bus.

I assumed 5V 300 ohm termination and 100 ohm drive impedance. Change to optmize as required.

Compute worst case CTR, factor some aging of emitter diode and include worst case temperature to ensure high SNR for signal on the bus.

2nd diode and current source generator simulates the opto emitter diode not shown.

Phototransistor can drive impedance of your choice.

Sim link

Answer 3

The problem with high speed on an unbalanced line improperly terminated is rise time, SNR and EMI immunity.

The problem with optoisolator transistors is decay time and a wide range in CTR.

The best solution I can think of is to change the PHY protocol to bi-phase or MFM like a floppy head and connect ethernet RD TD together or just use TD in both directions to create shared half-duplex and invent your own CDMA method or use one that already exists.

It is also readily avail (cheap (