1) How do you determine the baud rate that you want for your application while considering the clock of the MCU?
Usually the baud rate you pick is determined by the following factors.
a) The device you are connecting to. It may only support certain rates, and you must use one of those.
b) The length of the cable. Longer cables may only work with slower baud rates, controlled impedance cables, and termination.
c) Baud rate accuracy. Usually the bit timing needs to be better than ±5% to avoid bit errors. You can always achieve this if your baud rate divisor is at least 20. There is an exception to this if your clock source happens to be a close to a multiple of the baud rate. In that case you might get very accurate timing even with faster baud rates.
2) So if I were to send out a data stream higher than 9600Hz, I would be better off using a baud rate higher than 9600 to avoid data
corruption? I feel there's more to it than just that.
a) At a minimum, your baud rate should be fast enough that you can send all your data as fast as it comes in. You should probably add in some margin to account for the fact that your MCU must actually process the data.
3) if we use USART with a clock, isn't data sampled at each clock pulse (rising/falling etc)? If you've got a 16MHz MCU clock, meaning
you're putting out clock pulses every 62.5ns, and if you were to use a
baud rate of 9600 for data, how do 104us and 62.5ns work out? Or as
long as I'm using a faster clock than the TX data speed, I'm good
cause MCU is capable of sending as fast as the clock?
The MCU hardware would usually use the faster 16MHz clock to look for the falling edge of the start bit. After that it would use a delay (based on your baud rate divisor) to sample the center of each data bit and sample at that point. For example
divisor was 10 then the MCU would wait for 16 * 1.5 * 10 clock cycles and then sample the next bit. After that point, it would wait 10*16 clocks to sample the next bit and so on.
4) What's the essence of oversampling (8,16) of the data on the RX side? if the baud rates are the same on both TX and RX, the data
received is at the same speed as it's being sent. Or it has more to do
with external noise that might corrupt the data? Even then, where does
parity come into play then?
a) The 16X 8X (or even 4X) are not really over-sampling. They are just a multiplier that is added to the baud rate divisor. The MCU just samples each bit once (or three times) near its center. The only exception to that is start bit edge detection, which may be done at the full clock rate.
b) The historic reason for using 16X is that the 16550 UART chips used that.
b) Baud rates are often much slower than MCU clock rates. This makes sense because the MCU usually needs multiple clock cycles to process each byte, even if that processing is as simple as putting them in a buffer to process later. Baud rates near the MCU frequency are rarely usable, so putting a divisor up front allows for a wider selection of baud rates using the same 8-bit or 16-bit divisor.
c) The UART hardware itself needs some clock cycles to process each bit (this includes having three separate clock cycles when using the 3X sampling mode).
d) This allows for more accurate edge detection with low baud rate divisors. For example, using a baud rate divisor of 1 in 16X mode allows you to detect the edge of the start bit to within 6.25% of a bit time. Using a 4X would allow detection to within 25% of a bit time. On the other hand, when using large baud divisors (say 100) the difference between using 4X vs 8X vs 16X mode become negligible for edge detection purposes.
4.1) why are 3 middle out of the N samples are sampled and considered for noise detection, as shown in the image?
Any tolerance in the clocks causes the sample point to drift left or right. Bits are sampled near the center because it allows the system to work with the highest clock tolerances. Sampling anywhere else would require more accurate baud rates. Sampling three times near the center does create some noise immunity for high frequency noise.
4.2) With oversampling, you're technically reducing the resultant baud rate since you're taking only three samples?
No, the baud rate remains the same. Its not three bits being sampled, its the same bit being sampled three times.
4.3) Does oversampling by 8 have more receiver tolerance to clock deviation cause it generates a higher speed than oversampling by 16
a) Using an 8X over multiplier allows you to use a higher baud rate divisor, so you can potentially get more accurate timing. For example, to make 115200bps at 16X with a 16MHz clock you would need a baud rate divisor of 8.68. Since you can only pick integers, picking 9 yields 111111bps (3.6% error). At 8X you would need a divisor of 17.36. Picking the nearest integer, 17, yields 117647bps (2.1% error).
b) Alternatively, it can allow you to achieve higher baud rates. For example, at 16X with a 16MHz clock you are limited to 1Mbps. At 8X you could go as high as 2Mbps.