# Why capacitor value should be greater than gate capacitance of gate of NMOS in Bootstrap topology?

In case of buck converter when NMOS is used as high side driver then bootstrap circuit is used to keep gate voltages higher. While designing that bootstrap circuit, the value of capacitor is recommended to be 10 time greater than capacitance of gate of transistor. What's the reason behind this?

While designing that bootstrap circuit, the value of capacitor is recommended to be 10 time greater than capacitance of gate of transistor.

I didn't know if there's a rule of thumb like this, but the importance comes from the Q (charge), actually.

Here are some technical details:

The total charge held by the bootstrap capacitor is $$\Q_B = C_B \cdot V_C\$$. When the hi-side MOSFET turns on the total consumed charge is $$\Q_T=Q_G + I_G \cdot D\cdot T_{SW}\$$; where,

• $$\Q_G\$$ is the gate charge
• $$\I_G\$$ is the gate current (or total current drawn from the capacitor, a few nano-Amps)
• $$\D\$$ is the duty cycle and $$\T_{SW}\$$ is the switching period (i.e. 1/fSW)

The charge $$\Q_T\$$ will be provided by $$\C_B\$$ itself, thus $$\Q_B\$$ should be sufficiently large. When the charge is consumed, the capacitor voltage should not drop significantly, or else the MOSFET can turn off due to insufficient $$\V_{GS}\$$. So, $$\Q_T\leq C_B\cdot \Delta V_B\$$ where $$\\Delta V_B\$$ is the voltage drop across the bootstrap capacitor.

A practical example: Using this MOSFET ($$\\mathrm{Q_G=18nC}\$$) at $$\\mathrm{f_{SW}=100kHz}\$$ with a duty-cycle of 0.5. Let's assume that the maximum allowed voltage drop is $$\\mathrm{\Delta V_B = 100mVDC}\$$ and $$\\mathrm{I_G=100nA}\$$. So, $$\\mathrm{C_B\geq (18nC+0.1\mu A \cdot 10\mu s\cdot0.5) \ /\ 0.1V\approx 18nC \ / \ 0.1V = 180nF}\$$ which is 50+ times the gate capacitance. If more voltage drop is allowed then the required bootstrap capacitor can be lower. For example, for $$\\mathrm{\Delta V_B = 500mVDC}\$$ the bootstrap capacitor should be at least 36nF which is 10 times the input capacitance.

SUMMARY

I'm not sure if this can lead to a simplification like "CBOOT should be at least 10 times Ciss of the MOSFET". But sure it depends on the gate charge, actually. If you use buck converter ICs (i.e. the ICs having the MOSFET inside) you should always consider what the datasheet recommends.

To charge a MOSFET's gate capacitance up to a sufficient voltage to produce decent drain-source conduction (i.e. operate the MOSFET as a switch) requires the injection of current (as with any other capacitor): -

$$I = C\dfrac{dv}{dt}$$

The more current injected, the quicker will be the rise in gate-source voltage. Given that you want the gate-source voltage to rise pretty quickly when using the MOSFET as a switch in e.g. a buck converter, you are obliged to inject a decent amount of current.

But ultimately, you are stealing that current from the buck-converter output (that's what a bootstrap circuit does) AND you are stealing that current through the bootstrap capacitor AND, you don't want the voltage across the bootstrap capacitor to be much affected by the current hence, you design your bootstrap capacitor to be much bigger than the gate-source capacitance.

If the voltage across the bootstrap capacitor rose pretty quickly with the current you are stealing, then it leaves less headroom to produce a decent gate-source drive voltage to apply to the gate and the MOSFET would not adequately turn-on and you would lose power efficiency and the MOSFET would get hotter.

So, choosing a bootstrap capacitance of 10x the MOSFET gate-source capacitance is a rule of thumb - you can go more if you want and sometimes you can go a bit less.

Because the voltage in the bootstrap cap (any cap, actually) drops when you drain it, but you still need the voltage in the gate source cap to end up high enough to turn on the MOSFET. It drops less if it is bigger for the same charge taken from it.

If they were equal, for example you would need the bootstrap cap to start at double your required gate source voltage since it would be half the voltage by the time it charged the gate source cap (which would also probably be higher than what the gate oxide can withstand).