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I'm designing a 4-layer 6GHz RF PCB. The top layer is a signal layer and has the RF microstrip traces and the 2nd layer is an unbroken ground plane. I'm leaning against filling the remainder of the top layer with a ground plane stitched to the 2nd layer ground plane after reading a number of posts on this site indicating that it (1) isn't very useful when a full ground plane is used and (2) can create unintentional antennas. Additionally, since I'm using microstrips, I would need to keep the coplanar ground pour sufficiently far away which means that the total size of the copper pour would be significantly reduced.

However, I'd still like to use a via fence to prevent my microstrips acting like antennas and either disturbing nearby circuits or being disturbed by them. Are there any issues with using a via fence where the vias are not tied to a ground plane on the same layer as the microstrip? The vias would still, of course, be connected to the 2nd layer ground plane. I can't think of any reason why this would be an issue, and based on my understanding should be an equally effective EMI shield. Is this correct?

In a similar vein, is there any benefit to still keeping stitching vias in a \$\lambda/20\$ grid? The idea wouldn't be to stitch ground planes, but instead to act like a sort of general-purpose EM wave short for radiation from non-microstrip traces, or for any signals that managed to get through the microstrip via fence.

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  • \$\begingroup\$ What's the purpose of this via fence? Is it between tracks? It it on the periphery of the board to seal to the lid? In the second case, you'll want a top ground track round the periphery anyway. In the first case, unless there's a lid coming down onto the board (then see second case) a via fence is not going to do much. The fab and the planet may prefer a top pour, less copper to etch and throw away, and improves heat spreading slightly. Before worrying about whether to use a via fence between things, establish what your things are, and that should tell you if a ground on top is needed. \$\endgroup\$
    – Neil_UK
    Apr 22, 2020 at 7:17
  • \$\begingroup\$ The via fence will be between tracks. Specifically, microstrip transmission lines operating at 6GHz. Why is a via fence ineffective in this case? At least when a coplanar copper pour is used in conjunction with the fence I’ve seen many people on this forum recommend it’s use and seen it in a number of designs. \$\endgroup\$
    – MattHusz
    Apr 22, 2020 at 8:09
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    \$\begingroup\$ Effective or ineffective depends on what you're trying to achieve. A via fence will get you a few more dBs isolation than simple distance will. A via fence with top ground and a lid will get 100dB more. It depends whether you're building a spectrum analyser. \$\endgroup\$
    – Neil_UK
    Apr 22, 2020 at 9:54
  • \$\begingroup\$ Oh, that’s a huge difference. It’s not a spectrum analyser (it’s a radar) but I’d like very good noise isolation between the transmitter and receiver and other circuitry. I was planning on placing it in a faraday cage. Does the top layer pour need to be sufficiently close to the microstrip to be an effective shield? I was planning on giving a 2*trace width gap on each side so the coplanar ground doesn’t effect the characteristic impedance. This is based on stimulations I’ve run with openems. \$\endgroup\$
    – MattHusz
    Apr 22, 2020 at 15:55
  • \$\begingroup\$ I also have a fair amount of spacing between lines. I.e. more than 10x the trace width. \$\endgroup\$
    – MattHusz
    Apr 22, 2020 at 16:01

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First off, depending on the plating you use and the size of your microstrip lines, it could be that you want to pour the top metal anyways. For consistent plating, you need to have even, constant density over the PCB. Usually when you have a PCB that has very low copper density on the outer layers, the manufacturer will either ask you to increase density, or they will use a peel-off copper layer that they place before plating and remove after.

The nature of the microstrip trace is that the current and magnetic fields are usually well-confined around the trace in question. It is hard to say that a via wall is going to help you here.

Usually you do need copper on the top where the via is, because the electroplating process requires a seed to start going. This is in part why you have an annular ring requirement. How far away from your microstrip will these vias be?

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  • \$\begingroup\$ I was thinking twice the trace width, which in my case is a 0.8mm gap on each side. I had no idea about the plating effect... \$\endgroup\$
    – MattHusz
    Apr 22, 2020 at 15:32

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