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I'm trying to implement a total sum that follows this code

SUM = SUM + INPUT

SUM and INPUT are 5 bit signals in binary. I know how to implement the adder and i have 5 D flip flops to store SUM but at the start of the system, SUM is not defined because the input to SUM uses the output from the adder which uses SUM and so on and so forth. I'm not sure how to initialize my SUM to be all 0's. Any advice for building this circuit in general would be appreciated outside of my question.

Thanks in advance!

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  • \$\begingroup\$ You need a reset signal. Do your D flip flops have a reset input? If not, then you need to create your own reset signal by using logic gates to force the input to the flops to be 0. \$\endgroup\$
    – Justin
    Apr 22, 2020 at 13:09
  • \$\begingroup\$ So what signals do i put for CLEAR(RESET) and PRESET? From what i understand the only way we can force a signal is if any of the inputs to the NAND gates are 0, in which case it outputs 1. How can i use NAND gates to force a 0? \$\endgroup\$
    – terrabyte
    Apr 22, 2020 at 13:30
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    \$\begingroup\$ So do your flip flops have CLEAR(RESET) and PRESET inputs? If so, you don't need to add gates before the D input. \$\endgroup\$
    – Justin
    Apr 22, 2020 at 13:34
  • \$\begingroup\$ I'm building this in a schematic in Xilinx so I've just added the CLEAR and RESET inputs myself. \$\endgroup\$
    – terrabyte
    Apr 22, 2020 at 13:36
  • \$\begingroup\$ I didn't mean using a NAND gate, I mean using whatever combination of logic gates (NAND/NOR/AND/OR/NOT etc.) you need to make the value 0. I think you could do D[i]=originalD[i] AND (NOT RESET). \$\endgroup\$
    – Justin
    Apr 22, 2020 at 13:36

1 Answer 1

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You need a reset signal. If your flip flops have a reset input, you can just use that. Otherwise, you need to create your own reset signal by using logic gates to force the input to the flops to be 0.

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