Whats the difference between Soft IP and Hard IP in FPGA? I dont know whats the main difference. Can anybody help.
Soft IP is anything made from the generic logic fabric (LUTs, logic blocks, etc.) in the FPGA. The capability for soft IP is what makes an FPGA an FPGA.
Hard IP is anything that is circuitry that is hard-wired and etched into silicon to do only one thing and do it well. No extra baggage with all the fat trimmed so it can be small, efficient, and fast. Things like processors, DSP blocks, and high speed transceivers. For example, anything the core and all peripherals in a regular microcontroller or processor are hard IP.
Soft IP is rendered into lookup tables and flip-flops. Hard IP are chip blocks that perform higher level functions, like the Xilinx DSP48 slice that does multiply-accumulate.
Some parts have CPUs (e.g. Zynq ARM) and large controllers (e.g., PCI Express) that would otherwise take up a lot of resources and not make timing if they were rendered as soft IP.