I need to use a fast decoder to communicate with a SRAM memory, CY7C1041GN. The circuit I need to implement is the circuit suggested in the Example #5 of the document AN2408 .The suggested decoder in this example is obsolete, but I found another, even better, with a smaller Tpd, the model that I found was the SN74LVC1G139, its Tpd is in the range of 0.8ns to 3.6ns using VCC = 5V. The problem with this model is that it does not have active low Enable pin.
I supposed that the work done by the decoders in the example #5 of AN2408, could be done by logic gates, but I didn't find logic gates that are faster than the found decoders.
I searched in many places, I listed many 2x4 decoders at digikey site, I did parametric seach at Texas, Nexperia and OnSemi websites, but I didn't found a model that have a Tpd(propagation delay) as low as 3.6 ns. Does someone know, or has a tip, of a model of decoder with Enable-Low pin that is able to reach these values of Tpd ?