# Why the voltage across MOSFET (VDS) is increasing even when the voltage at the gate (VGS) is constant?

Following is the screenshot schematic for Buck-derived half-bridge isolated DC-DC converter in LTSpice. In the following plot it can be seen that when the lower switch is turned off the voltage across it (purple) rises to a maximum value and it makes sense because the voltage across a switch is maximum in the off state. When the upper switch is turned on then voltage across it starts rising (yellow), but the voltage across a switch is zero (minimum) when it is in on state. At first I think that this rise in VDS is due to decrease in the Vg as the boot strap capacitor is discharging. But when I plotted the VGS (green) it is essentially constant well above the threshold value. My question is how the VDS can change if VGS is constant? Also why the voltage across the upper switch (with VGS=0V) changes to zero when the lower switch is turned off as highlighted on the plot?

Inductances are calculated using the relation $$\\ sqrt(L_p/L_s)=1/n)\$$ where n is the turn ratio I assumed Ls to be 1uH and then Lp is found

Here are the associated simulation files ## 1 Answer

You're switching frequency is 40kHz and the inductances are 1uH. If you'd be probing the currents in the switches you'd have a revelation. Change them to be 100uH, for example, and watch the magic. How did you calculate them, btw?

Also, try to be a bit more tidy when drawing the schematic, at the very least for presentation purposes -- it's a pain to figure out all the connections as they are drawn now, and this is a small schematic.

Getting into transformer design would mean discussing an entire chapter of the behemoth that is electronics. Instead, here is a document which survived time (thank goodness): Designing Magnetic Components for High Frequency DC-DC Converters (a search should reveal this within the first results). As I said, there are other application notes on the subject, freely available on the Internet, which you are welcome to search for, yourself.

• You are talking about the transformer inductances, right? I include the relation for calculating them by editing question. – Sohail Ahmed Apr 25 '20 at 12:06
• That's a relative relation between them. In other words they are both wrong by the same factor. See suggested experiment in this answer. – user_1818839 Apr 25 '20 at 12:48
• @SohailAhmed While engineering implies assumptions, what you did is very wrong. The value of the inductance for the transformer is based on I/O voltages, currents, curretn ripple, all these while taking are to not saturate the core. Since you are working with air cores (in the simulation), you can omit saturation, but not the rest. The transformer is an integral part in the design, you cannot simply throw a dice and expect things to work. There are plenty of application notes about such things. Best to read them before continuing. – a concerned citizen Apr 25 '20 at 14:22
• @aconcernedcitizen Could you please say something more about what I did is very wrong, why? Why this assumption of inductance is not a good one as it satisfies the relation with voltage ratio? I know about relationship between ripple current and inductance, but that is for the filter inductor. Could you please give a good reference from where these things could be learnt. I I am beginner in the design of inductors and transformers and switching power converters and. Could you please provide a good reference which talks about the aspect which you are referring to. Your help is much appreciated. – Sohail Ahmed Apr 25 '20 at 14:56
• Could you please update answer with this queries.Thank you very much for your time and help. – Sohail Ahmed Apr 25 '20 at 14:58