I'm trying to to find the best way to force an inverting amplifier to postive saturation with a gate input, but otherwise leave the function of the op-amp intact. I've come up with a few ways to do this which all use some kind of current sink at the summing node. Using the open collector output of a comparator directly seemed the best way to go, but the offset contribution was significant in simulation. So now I'm not wondering if using a discrete mosfet or bjt is a better route. Unfortunately I need to control that with a positive 0 to 5V gate (from a schtmitt trigger), and the only way I can get this to work is with negative control voltages. Anybody have any suggestions for me?

The image shows the circuit working with a P-channel mosfet controlled by a -12 to +12V gate. I

  • \$\begingroup\$ Wouldnt it be easier to add a pull up transistor and pulldown resistor to your + input? \$\endgroup\$ – DKNguyen Apr 26 '20 at 1:47
  • \$\begingroup\$ @DKNguyen That doesn't seem to pull it to saturation. \$\endgroup\$ – Jon Apr 26 '20 at 2:09
  • \$\begingroup\$ oh yeah....it might not because the resistor on -input \$\endgroup\$ – DKNguyen Apr 26 '20 at 2:15
  • \$\begingroup\$ Why do you want to do this? Any reason you can't put the 'saturation' signal on the + input? \$\endgroup\$ – Bruce Abbott Apr 26 '20 at 5:02

OP Amp Saturation Controller

Op Amp Saturation Controller

Simulations done using Circuit Wizard.

  • \$\begingroup\$ Ah yes of course. What is the advantage of using bjts over mosfets? Lower offset? \$\endgroup\$ – Jon Apr 26 '20 at 19:13
  • \$\begingroup\$ For this application it's probably arbitrary which are used. BJT designs usually require more resistors because they often need base current limiting resistors.Rather than one having any particular technical advantage, the main reasons for me selecting BJTs in preference to FETs for this application would be which I prefer designing with and which I could most easily lay my hands on. Which have I got in? FETs require handling precautions to avoid blowing a hole in the gate. A FET gate won't load your source signal if it's high impedance. \$\endgroup\$ – James Apr 26 '20 at 20:14

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