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I am implementing a minimal I²C master, trying to keep it as simple as possible (but as complex as necessary). This master is a hardware peripheral - you could consider it part of an FPGA design, controlled by software.

The initial requirement for this project is that it supports multiple slaves but not multiple masters on the bus, so I'm wondering whether I need to implement the ability to generate "repeated start" conditions. As far as I understand those are only required retain control of the bus in the context of a multi-master setup; this is explained rather well on i2c-bus.org.

Are you aware of any slaves that strictly require the use of repeated starts? The I²C page on Wikipedia gives an example of a 24C32 EEPROM which uses repeated starts for random access reads, same is said in the part's data sheet. But neither sources mention whether it would also work with separate WRITE and READ transactions where each transaction is terminated by a STOP condition.

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    \$\begingroup\$ Off the top of my head, yes I have encountered I2C slave devices that required Sr instead of just S. Particularly register-based devices. Depends on how the I2C slave device's internal state machine is implemented, but sometimes there is a stop condition detector that resets the machine. If you don't support repeated-start, then there will be certain devices that your library doesn't support, and it can be hard to predict without actually testing the device. \$\endgroup\$
    – MarkU
    Apr 27, 2020 at 1:25
  • \$\begingroup\$ Which MCU? Are you using hardware I2C peripheral or software I2C? Which peripherals there would be? What protocol requirements those peripherals have? \$\endgroup\$
    – Justme
    Apr 27, 2020 at 5:19
  • \$\begingroup\$ @Justme Consider this to be a custom FPGA, so I have full control over the pins, their drive and the timing. The I2C master should be able to deal with any I2C slave in the wild (well, most of them), which is the reason for my question. \$\endgroup\$
    – FriendFX
    Apr 29, 2020 at 2:29
  • \$\begingroup\$ @MarkU Could you point me to specific slave device (documentation) that mentions this? I'd be happy to accept an answer with a valid reference. \$\endgroup\$
    – FriendFX
    Apr 29, 2020 at 7:11

2 Answers 2

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Notwithstanding whatever that i2c-bus.org website tells you, I2C Repeated Start is not just used for multi-master arbitration. Repeated start is baked into SMBus Read-Word protocol (distinct from Receive-Word). Maxim MAX31875 temperature sensor is one example, -- like most manufacturers, the datasheet explicitly specifies how I2C/SMBus is used on this particular IC. See page 8, SMBus protocol explicitly requires repeated start. Not start-write-regaddress-stop-start-read-stop. A stop condition cancels the operation.

If you create a 'minimal' I2C device driver that doesn't support repeated start, your device driver will be limited -- although it might work for some EEPROM, port expander, and digipots (depending on datasheets), it is 'broken' for SMBus PMBus and MIPI devices.

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Yes, some slaves strictly require a repated start so they do exist. Repeated starts are not only used for keeping bus while in multimaster operation. Whether it affects your device is another thing, but always expect to encounter chips that need special handling in some ways. Some other slaves might require clock stretching. Repeated start is usually not that difficult to implement.

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  • \$\begingroup\$ Thanks for your answer. Could you be a bit more specific about the slaves? Which devices, is there documentation, do you have some links? \$\endgroup\$
    – FriendFX
    Apr 29, 2020 at 2:30
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    \$\begingroup\$ It has been discussed here within a week or two, in the context of ADV video chips. Do note that there is no single fixed protocol format. Some chips don't have registers. Some chips take 1 byte of register address. Some chips take two. Any amount of bytes could be read and written in a transaction. Derived interfaces such as SMBus and E-DDC require their own quirks. And every MCU I've used has had some limitations or bugs in their I2C peripherals that make talking to certain chips difficult. No MCU has had a I2C bus reset operation for example, which is a pain with slaves without reset pin. \$\endgroup\$
    – Justme
    Apr 29, 2020 at 5:19
  • \$\begingroup\$ Sorry, but I couldn't find anything under ADV within the last few months. As for the protocol, I think what you're referring to (such as register layout of slave devices) simply isn't specified by I²C and is usually solved by software. The I²C spec defines what repeated starts are, but I couldn't find anything authoritative that says a master is required to implement them to talk to most slave types. \$\endgroup\$
    – FriendFX
    Apr 29, 2020 at 7:08
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    \$\begingroup\$ ADS112C04 (an ADC) from Texas Instruments requires a Restart-Conditition ADS112C04 \$\endgroup\$
    – markus-nm
    Apr 29, 2020 at 8:44
  • \$\begingroup\$ @FriendX it's under tags i2c and linux. Repeated starts are nothing more than normal starts. The difference is that normal start is sent after stop (and bus idle), while repeated start is not sent after stop. So they are not a separate magical thing. \$\endgroup\$
    – Justme
    Apr 29, 2020 at 9:23

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