What is the difference between soft core and hard macro processors used in FPGAs in terms of power?
It’s hard to say exactly. At the same clock rate, the soft IP version will use more power as it uses more die area and resources. But the hard macro can and likely will be run faster, so its power will increase.
If you have access to the FPGA place-and-route tool, one of the reports it should give you is power. Try it both ways and see.