PCB Crystal Layout

Question

I'm designing PCB with 16MHz crystal for ATMega328p.

Right now that is my layout. VIAs ring around edge of board is to stop EMI radiation from edges. There is no Ground plane under capacitors and crystal. Top layer under ATMega is Ground, bottom VCC. Red is top, blue is bottom. Crystal and MCU ground plane is connected to Global bottom ground plane only in one place. As You can see there is not much space on PCB. Can anyone suggest me how to improve my layout?

@EDIT

Updated with suggestions. Should crystal grounds be connected together or only stiched to bottom ground plane?

@EDIT2 I haven't moved labels inside PCB, because i don't care about them. I'll be ordering PCB without top silkscreen, so that's not a big deal. That about VIAs under crystal ground pins? Should it be there? I've reduced number or VIAs. It looks like that now:

Answer 1

Initial Design Review

The first thing I notice is your MCU ground is only connected to the main ground plane via a tiny thin trace that runs around the crystal:

This means all the current return paths from the various signals will run through this elongated loop which will effectively act like an antenna - the complete opposite of what you want.

You should try to give the MCU as solid of a ground connection as possible. I'd remove the power plane from underneath the MCU and make it a solid ground plane with several stitching vias connecting top and bottom layers underneath the MCU. Route the route power traces to the various via as a simple trace - perhaps a little star connection if you wish.

There is a decoupling capacitor on the left of the chip, however that doesn't connect to the ground plane below - a via could be added which would help the situation.

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Secondly I wouldn't remove the ground plane underneath the crystal. Leaving the large gap will cause the current return paths for the crystal traces to have to flow through an elongated path back to the MCU instead of being able to run directly underneath the traces in a short loop.

Remove the ground plane gap, and add stitching vias from the crystal caps back to ground.

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You probably don't need to isolate the stitching ring from the ground plane on the top layer either. I'm not sure it will have any affect doing so.

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Update: (Based on Revision 2 of question)

The layout of the ground plane is much improved. I would suggest however you've gone a bit over the top on the number of extra stitching vias.

For underneath the MCU, I'd go with either 5 vias in an X shape, or 9 vias in a 3x3 grid.

For the MCU and decoupling caps one or two each will be fine.

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My other suggestion would be to tidy up the reference designators on the board. Make sure all ref-des labes are within the confines of the board, and don't overlap the copper pads.

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Update: (Based on Revision 3 of question)

Much better. My only final point would be to remove the four vias directly under the crystal. The ground pads of the crystal typically just connect to the shell and have little function. You can simply connect the pad in the top right to the ground plane, and a small trace to the bottom left pad as in your first drawing.