I have 8 cells in series and I want to check them, whether all are connected. I came up with the following schematic:
My question is about R and how viable this solution is.
My reasons for calculating R is the following: I saw that a CMOS gate leaks 1uA. While I don't want to waste energy, I want to be as closely as possible. Not too close, due to noise. So I came up with 470k. Is this too high? Does this work? (Sorry, I don't have 2V Zeners at hand, so I can't check it myself)
Let's say I have a RC element (R=100, C=0.1uF) between the cell and R. Does this help and make those 470k a safer solution?
Do you see any other problems?