While testing a MCP6H01 I came across some weird behavior when the CM voltage exceeds the operating range specified in the datasheet (VDD-2.3V Max).
This is with the op-amp configured as a unity gain follower and rails of ±3V, Both channels are 1V/div. Channel 1 (orange) is the output, and Channel 2 (purple) is the input, as you can see when the input (and common mode signal) exceeds the specified maximum, it "latches" to VDD until the CM signal drops below the spec.
What causes this to happen? Why does it show this peculiar behavior? Looking at analogous CMOS op-amps like the ADA4665-2, they have CM ranges that go to or slightly exceed the rails as you would expect.