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I am adding step-up to my PCB and I wonder if I have to make trace order like in this design. I mean if input voltage has to go first through power inductor, then capacitor and finally step-up converter IC.

My design is following: Input (SW2_1) shares trace with IC (U4) then capacitor (C8) and power inductor (L1)enter image description here

Schematic enter image description here

EDIT: update layout (no silk) enter image description here

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  • \$\begingroup\$ Post the schematic for that in your question. \$\endgroup\$ – Neil_UK May 1 at 12:40
  • \$\begingroup\$ What chip are you using? Have you looked at the recommended layout for it? \$\endgroup\$ – Ron Beyer May 1 at 12:42
  • \$\begingroup\$ Careful with GND vias on a chip pad - they tend to suck away solder. Commercial assembly plugs these vias before soldering, so the solder joint will be reliable. \$\endgroup\$ – rdtsc May 1 at 12:45
  • \$\begingroup\$ @Neil_UK added to post \$\endgroup\$ – oflfo2 May 1 at 13:13
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    \$\begingroup\$ You're still resisting putting that extra ground via into space between C8 pads. Not sure what jupiter meant by ground under L1 cannot be existed. You'll need to look at the datasheet for the specific inductor you're using. I've had a quick look at a few 7x7 inductors but can't identify a 7x7x4 one out of the dozens there. The Wurth ones say 'no vias or sensitive traces under', so maybe there could be conductors under, and incomplete shielding of the field, so some types? Ground covered in resist should not be a problem. \$\endgroup\$ – Neil_UK May 1 at 15:29
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  1. The GND between L1 cannot be existed.
  2. C3 should replaced with R4.
  3. C3 GND should connected with MT3608 pin 2

May these help you.

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  • \$\begingroup\$ thanks for tips, can you check updated layout? C3 replaced. Are vias properly positioned? Btw from bottom is ground (L1) is there any problem? \$\endgroup\$ – oflfo2 May 1 at 13:39
  • \$\begingroup\$ Why 1., jupiter.guo? \$\endgroup\$ – Marcus Müller May 1 at 15:26

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