LTSpice simulation issue

Question

I am studying a circuit which will charge a capacitor till using a voltage doubler till it reaches a specified voltage value. Then it will discharge through a resistor. An SPDT switch is realised for this function using 2 SPST switches. A behavioral source is used to control these switches. But the simulation is getting stuck when this switching is about to happen. Any idea why this is happening

Version 4
SHEET 1 2296 680
WIRE 400 -112 80 -112
WIRE 656 -96 640 -96
WIRE 400 -48 400 -112
WIRE 656 16 656 -96
WIRE 400 64 400 16
WIRE 400 64 320 64
WIRE 496 64 400 64
WIRE 512 64 496 64
WIRE 640 64 576 64
WIRE 768 64 720 64
WIRE 848 64 768 64
WIRE 1024 64 928 64
WIRE 320 80 320 64
WIRE 400 80 400 64
WIRE 1024 80 1024 64
WIRE 80 96 80 -112
WIRE 496 96 496 64
WIRE 768 128 768 64
WIRE 320 208 320 144
WIRE 400 208 400 144
WIRE 80 224 80 176
WIRE 1472 224 1472 192
WIRE 496 288 496 160
WIRE 768 288 768 192
WIRE 768 288 496 288
WIRE 1024 288 1024 160
FLAG 80 224 0
FLAG 400 208 0
FLAG 320 208 0
FLAG 1472 224 0
FLAG 1472 112 Vc1
FLAG 864 16 Vc1
FLAG 912 16 0
FLAG 768 64 Vout
FLAG 1360 192 0
FLAG 1360 112 Vdc
FLAG 1024 288 0
FLAG 768 288 0
FLAG 576 -96 Vc1
FLAG 704 16 0
SYMBOL voltage 80 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=100
SYMATTR InstName V1
SYMATTR Value SINE(0 220 60)
SYMBOL cap 384 -48 R0
SYMATTR InstName C1
SYMATTR Value 30pF
SYMATTR SpiceLine Rser=0.1
SYMBOL diode 512 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL diode 512 160 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL cap 752 128 R0
SYMATTR InstName C3
SYMATTR Value 100n
SYMATTR SpiceLine Rser=2
SYMBOL cap 304 80 R0
SYMATTR InstName C4
SYMATTR Value 30pF
SYMATTR SpiceLine Rser=0.1
SYMBOL cap 384 80 R0
SYMATTR InstName C2
SYMATTR Value 30pF
SYMATTR SpiceLine Rser=0.1
SYMBOL res 1008 64 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL bv 1472 96 R0
SYMATTR InstName B1
SYMATTR Value V=if(V(Vout)>V(Vdc),5,0)
SYMBOL voltage 1360 96 R0
SYMATTR InstName V2
SYMATTR Value 145V
SYMBOL sw 944 64 R90
SYMATTR InstName SW3
SYMATTR Value S3
SYMBOL sw 736 64 R90
SYMATTR InstName SW1
SYMATTR Value S3
SYMBOL Digital\\inv 576 -160 R0
SYMATTR InstName A1
SYMATTR Value2 Vhigh=5 Vlow=0
TEXT 48 248 Left 2 !.tran 300 startup uic
TEXT 592 392 Left 2 ;.step param C LIST 100n 1u 10u
TEXT 592 432 Left 2 ;.meas TRAN t9 FIND time WHEN V(Vout)=145 TD=0 FALL=1
TEXT 592 464 Left 2 !.model S3 SW(Ron=125 Roff=1000000G Vt=2.5 Vh=-1.5)

Answer 1

Besides what Spehro Pefhany said, there are a few other things:

• the Roff/Ron ratio for the VCSW is too large, and it can (and will) introduce possible numeric inaccuracies. Roff=1G is more than enough, even air has a finite resistance. Still, you used negative hysteresis, which is the recommended way (well done!).

• instead of using a conditional if() (corrected in the other answer), which is guaranteed to introduce discontinuities, why not use the readily available A-devices, which can also reduce the component count and provide guaranteed convergence and superior behaviour during simulation. The if() can be replaced by a Schmitt trigger, the 145V voltage source can be eliminated by setting vt=145, and the inverter can also be eliminated by using the complementary output of the Schmitt trigger. In addition, tau can control the rising/falling times to have a smoother behaviour and, thus, continuous derivatives, while td (and, possibly, vh) avoids self-oscillations at very high frequencies. In fact, you may even discard the Schmitt trigger, too, by using the vt and vh of the switches, but that tends to be a bit finicky and it can make the schematic a bit less readable.

• the diodes you are using are the default ones which, even if they have a tiny smooth region around the knee (a few points, no more), it can be improved with additional settings. In particular, the forward voltage and the on resistance should be set, while epsilon/revepsilon will make your like easier by introducing quadratic smooth knee regions, especially when switching is involved.

• you used series resistance for the capacitors probably to avoid high switching currents and noise (well done!, part II), but the values are a bit too high than what you'd expect from such small capacitors and, besides, this is meant to be a study-case, borderline ideal, so Rser=1m is more than enough in this case. This causes you to adapt the input capacitive divider.

• you have used uic in the simulation card, which ensures that everything starts from zero, so startup is no longer needed, particularly since this flag is used for DC supplies, it adds a small ramp from zero to DC at the beginning. You only have a sine, so it's not needed.

• one more (possible) thing, the sine source has 220 as the value but, unless you already know, that is not the RMS value, but the peak value. So if you need 220V RMS then you will need to set it to ~311.

With these, this is how it looks, and it runs without hiccups, and fast (I stopped it at ~120s since the switching frequency gets too high compared to the sine source):

If the switching frequency is too high, inscrease td, and if you can live with larger ripple, you can set vh>0, too.

Answer 2

Okay, great, it's easy to load the circuit using the provided .asc file. This should be SOP for all LTspice questions.

Your problem has to do with the way the solver works and the non-differentiable discontinuity introduced by your behavioral voltage source 'if' statement. Even though you've set the switches to smoothly transition via the negative hysteresis settings.

If you change the behavioral source 'value' to V=if(V(Vout)>V(Vdc),V(Vout)-V(Vdc),0) it should work (I also added an RC low pass filter to smooth it more), though 145 is right on the edge. Setting input voltage to 311 (220VAC RMS) and adding an RC as shown allows it to work properly:

Edit: Okay, that inverter is also causing problems. Adding a second smooth control behavioral voltage source gets rid of the RC kluge: