The PSRR of a device is the dB measurement of the power supply noise rejection. In my case, I have an LP5907 LDO with a PSRR of ~80dB, which would mean that if I have 10dBm of powerline noise on the input, I'd expect it to be reduced to -70dBm on the output - which is great!

But I'm actually more concerned with the noise being generated by the device fed by the LDO, and how much switching noise will end up feeding back into the system. Is there a device characteristic that describes its susceptibility to downstream noise sources?

  • \$\begingroup\$ What device is feeding into the LDO? \$\endgroup\$
    – Groger
    May 1, 2020 at 17:11
  • 3
    \$\begingroup\$ LDO linear regulator supply current = LDO load current + quiescent current, so I assume 100% of the current noise drawn by the load will feed through to the power source as load current noise. \$\endgroup\$
    – MarkU
    May 1, 2020 at 17:19
  • \$\begingroup\$ I'm not sure if it is more related to the transient load regulation or the CMRR, but in any case I've read that the switching harmonics are usually high enough to go straight through the regulator so you need ferrites and filtering to prevent that. I've never seen such a load regulation vs frequency quantitized nor have I ever seen a "load regulation frequency response curve". Only ever a PSRR frequency curve. \$\endgroup\$
    – DKNguyen
    May 1, 2020 at 17:27
  • \$\begingroup\$ I don't get where your dBm units are coming from, but it does attenuate input ripple voltage by 80dB, but only at 1kHz frequency. At higher frequency like 100kHz, it's only 60dB. \$\endgroup\$
    – Justme
    May 1, 2020 at 17:31
  • \$\begingroup\$ Are you more concerned about AC load currents affecting the LDO output voltage (what my answer is about) or affecting the input current (what @Justme's answer is about)? \$\endgroup\$
    – The Photon
    May 1, 2020 at 17:37

5 Answers 5


What you are expecting is never shown as this is the product of the spectral density of the load current times the spectral density of the source impedance.

Vs(f)= I(f)*Zs(f)

It is more useful to examine impedance ratios, Q and f-3dB and use a filter simulator to examine problems. I have found this way to be very effective ( Falstad's filter+Bode plots) for component selection and effects of ESR on various C values with CLC Pi filters to attenuate and improve decoupling with both differential for conducted noise and CM chokes for radiated noise.

At DC this reduces to simply DC impedance ratio source/load which is also known as Load Regulation error which is often in the 1% range.

In the audio frequency range , the inverse of this is called damping ratio referred to a standard load speaker/ source impedance with closed loop gain.


If you take the SPICE model (or a real part) and sweep an AC current sink at the output you should be able to get a good idea of what the characteristics are over a range of frequencies.

At relatively high frequencies, the output capacitance (eg. 1uF ceramic plus any other bypass capacitors in your circuit) will dominate, and at DC, obviously, all the current comes from the source and the capacitors have no effect. At intermediate frequencies the output impedance of the regulator, input and output capacitances should have a noticeable effect if you model the circuit accurately (such as source impedance at the input).

I don't think you should be using dBm for PSRR - the specification is based on voltage ratios so 20 log(x/y) gives the ratio in dB.

It's not uncommon to have some kind of input filter on a power supply to control conducted noise. Typically you put an LISN (line impedance stabilization network) in the input circuit ahead of the filter to make measurements.

Edit: Here is a plot of a simple LDO ADM7172 with a 10mA peak load applied over 100mA DC base load.

enter image description here

  • \$\begingroup\$ Spice models for these parts are always transient models, not AC analysis models. I could manually adjust values and get an idea of how a device performs, but I'm trying to find out if there are any useful summary statistics I can use to compare parts. As for dBm for PSRR, decibels are by definition a power ratio. It's either power/power or (voltage/voltage)^2. Noise is also typically given as spectral power, not spectral voltage. \$\endgroup\$ May 1, 2020 at 21:46
  • \$\begingroup\$ Not sure what you mean by "AC analysis model". We use voltage ratios (and RMS voltage for noise) because the impedance is not fixed. Similarly for spectral density of noise we use nV/sqrt(Hz) for voltage noise or pA/sqrt(Hz) for current noise. \$\endgroup\$ May 1, 2020 at 22:34
  • \$\begingroup\$ I mean that the spice models I have are specified for transient analysis, not small-signal AC. I have no idea how accurate the model is if I just do an AC analysis anyway. \$\endgroup\$ May 2, 2020 at 23:35
  • \$\begingroup\$ If the response looks more-or-less sinusoidal for a sinusoidal input the AC analysis is useful. \$\endgroup\$ May 3, 2020 at 0:24
  • \$\begingroup\$ If the spice model is not specified for AC analysis, it's very definitely not useful. It's the old garbage-in-garbage-out problem. I'd be better off making an estimated guess at the AC characteristics and modeling it myself, which is what I'm doing. At the end of the day my question is less about what analysis I should do, and more about interpreting the given datasheet values to inform that analysis. \$\endgroup\$ May 3, 2020 at 17:21

But I'm actually more concerned with the noise being generated by the device fed by the LDO, and how much switching noise will end up feeding back into the system.

At low frequencies, this is called load regulation. In your datasheet, this is shown in the form of a DC transfer curve in figure 8:

enter image description here

At high frequencies (above ~100 kHz, depending on the regulator), it's called load transient response or output impedance. But it is not so much a function of the LDO regulator itself as of the bypass capacitors you connect from the output to ground.

In your datasheet, this is shown in the form of a time-domain response in figures 12-14 (for different temperatures):

enter image description here

A note above the typical performance graphs says this is measured with 1 uF output capacitance.


LDOs have LARGE onchip transistors (FETs, usually, for low voltage drop) with large junction area and large gate-channel and drain-channel capacitances.

Assume 100 picoFarad across that transistor.

Given 1pF at 1GHz is =j159 ohms, then 100pF at 100MHz (Fring of MCU or switchreg) will be 16 ohms from output to input.


You can always put an extra RC or LC filter between system supply and LDO regulator input to prevent ripples on LDO output load to couple back into system supply.


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