There is a condition that the circuit output should be 0 when "enable" bit is zero. I have done that by placing an optocoupler to disconnect main 15 V supply from the ICs, but only after assembling and testing I have found out that ICs have these ESD protection diodes from input to VCC which leads to condition that input has to be always < VCC + 0.3 V.
Now when enable is 0, the +15V VCC floats. Now when I connect input i get some voltage at the VCC rail and outputs of IC:s because the voltage is "leaking" through the esd protection diodes.
Is there any workaround that could be done with minimal changes to the design so that the output will be as close to zero as possible (while there is still pulsed 5V input)?
Of course by still keeping the lifetime expectancy of ICs as high as possible. Condition where enable is 0 while there is some input voltage is quite rare and not normal operating condition.